Searched refs:DispatchPtr (Results 1 - 8 of 8) sorted by relevance

/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPULowerKernelAttributes.cpp242 Function *DispatchPtr = Mod->getFunction(DispatchPtrName); local
243 if (!DispatchPtr) // Dispatch ptr not used.
249 for (auto *U : DispatchPtr->users()) {
H A DAMDGPUArgumentUsageInfo.cpp65 << " DispatchPtr: " << FI.second.DispatchPtr
127 return std::make_tuple(DispatchPtr ? &DispatchPtr : nullptr,
151 AI.DispatchPtr = ArgDescriptor::createRegister(AMDGPU::SGPR4_SGPR5);
H A DSIMachineFunctionInfo.cpp33 DispatchPtr(false),
148 DispatchPtr = true;
155 DispatchPtr = true;
210 ArgInfo.DispatchPtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg(
213 return ArgInfo.DispatchPtr.getRegister();
515 Any |= convertArg(AI.DispatchPtr, ArgInfo.DispatchPtr);
H A DAMDGPUArgumentUsageInfo.h126 ArgDescriptor DispatchPtr; member in struct:llvm::AMDGPUFunctionArgInfo
H A DSIMachineFunctionInfo.h188 Optional<SIArgument> DispatchPtr; member in struct:llvm::yaml::SIArgumentInfo
212 YamlIO.mapOptional("dispatchPtr", AI.DispatchPtr);
394 bool DispatchPtr : 1;
615 return DispatchPtr;
H A DAMDGPUPromoteAlloca.cpp280 CallInst *DispatchPtr = Builder.CreateCall(DispatchPtrFn, {}); local
281 DispatchPtr->addAttribute(AttributeList::ReturnIndex, Attribute::NoAlias);
282 DispatchPtr->addAttribute(AttributeList::ReturnIndex, Attribute::NonNull);
285 DispatchPtr->addDereferenceableAttr(AttributeList::ReturnIndex, 64);
289 DispatchPtr, PointerType::get(I32Ty, AMDGPUAS::CONSTANT_ADDRESS));
H A DAMDGPUTargetMachine.cpp1165 parseAndCheckArgument(YamlMFI.ArgInfo->DispatchPtr,
1166 AMDGPU::SReg_64RegClass, MFI->ArgInfo.DispatchPtr,
H A DSIISelLowering.cpp1867 ArgInfo.DispatchPtr = allocateSGPR64Input(CCInfo);

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