Searched refs:AR_PHY_BASE (Results 1 - 13 of 13) sorted by relevance
/freebsd-13-stable/sys/dev/ath/ath_hal/ar5210/ |
H A D | ar5210phy.h | 29 #define AR_PHY_BASE 0x9800 /* PHY register base */ macro 30 #define AR_PHY(_n) (AR_PHY_BASE + ((_n)<<2))
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H A D | ar5210_attach.c | 247 OS_REG_WRITE(ah, (AR_PHY_BASE + (0x34 << 2)), 0x00001c16); 249 OS_REG_WRITE(ah, (AR_PHY_BASE + (0x20 << 2)), 0x00010000); 250 revid = (OS_REG_READ(ah, AR_PHY_BASE + (256 << 2)) >> 28) & 0xf;
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H A D | ar5210_misc.c | 387 nf = (OS_REG_READ(ah, AR_PHY_BASE + (25 << 2)) >> 19) & 0x1ff;
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/freebsd-13-stable/sys/dev/ath/ath_hal/ar5211/ |
H A D | ar5211phy.h | 29 #define AR_PHY_BASE 0x9800 /* PHY registers base address */ macro 30 #define AR_PHY(_n) (AR_PHY_BASE + ((_n)<<2))
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H A D | ar5211_attach.c | 195 OS_REG_WRITE(ah, (AR_PHY_BASE + (0x34 << 2)), 0x00001c16); 197 OS_REG_WRITE(ah, (AR_PHY_BASE + (0x20 << 2)), 0x00010000); 198 val = (OS_REG_READ(ah, AR_PHY_BASE + (256 << 2)) >> 24) & 0xff; 288 OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000007); 290 OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000047); 321 OS_REG_WRITE(ah, AR_PHY_BASE, 0x00004007); 326 OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000007); 392 uint32_t regAddr[2] = { AR_STA_ID0, AR_PHY_BASE+(8 << 2) };
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H A D | ar5211_reset.c | 286 OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000007); 288 OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000047); 1242 OS_REG_WRITE(ah, AR_PHY_BASE + (90 << 2), 1245 OS_REG_WRITE(ah, AR_PHY_BASE + (17 << 2), 1246 (OS_REG_READ(ah, AR_PHY_BASE + (17 << 2)) & 0xFFFFC07F) | 1248 OS_REG_WRITE(ah, AR_PHY_BASE + (18 << 2), 1249 (OS_REG_READ(ah, AR_PHY_BASE + (18 << 2)) & 0xFFFC0FFF) | 1251 OS_REG_WRITE(ah, AR_PHY_BASE + (20 << 2), 1252 (OS_REG_READ(ah, AR_PHY_BASE + (20 << 2)) & 0xFFFF0000) | 1255 OS_REG_WRITE(ah, AR_PHY_BASE [all...] |
H A D | ar5211_misc.c | 181 OS_REG_SET_BIT(ah, AR_PHY_BASE, 0x00002000);
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/freebsd-13-stable/sys/dev/otus/ |
H A D | if_otusreg.h | 124 #define AR_PHY_BASE 0x1c5800 macro 125 #define AR_PHY(reg) (AR_PHY_BASE + (reg) * 4) 126 #define AR_PHY_TURBO (AR_PHY_BASE + 0x0004) 127 #define AR_PHY_RF_CTL3 (AR_PHY_BASE + 0x0028) 128 #define AR_PHY_RF_CTL4 (AR_PHY_BASE + 0x0034) 129 #define AR_PHY_SETTLING (AR_PHY_BASE + 0x0044) 130 #define AR_PHY_RXGAIN (AR_PHY_BASE + 0x0048) 131 #define AR_PHY_DESIRED_SZ (AR_PHY_BASE + 0x0050) 132 #define AR_PHY_FIND_SIG (AR_PHY_BASE + 0x0058) 133 #define AR_PHY_AGC_CTL1 (AR_PHY_BASE [all...] |
/freebsd-13-stable/sys/dev/ath/ath_hal/ar5212/ |
H A D | ar5212phy.h | 25 #define AR_PHY_BASE 0x9800 /* base address of phy regs */ macro 26 #define AR_PHY(_n) (AR_PHY_BASE + ((_n)<<2))
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H A D | ar5212_attach.c | 606 uint32_t regAddr[2] = { AR_STA_ID0, AR_PHY_BASE+(8 << 2) };
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/freebsd-13-stable/tools/tools/ath/athdecode/ |
H A D | main.c | 402 } else if (AR_PHY_BASE <= r->reg) { 404 (r->reg - AR_PHY_BASE) >> 2, r->reg);
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/freebsd-13-stable/sys/contrib/dev/ath/ath_hal/ar9300/ |
H A D | ar9300phy.h | 34 #define AR_PHY_BASE offsetof(struct bb_reg_map, bb_chn_reg_map) /* base address of phy regs */ macro 35 #define AR_PHY(_n) (AR_PHY_BASE + ((_n)<<2))
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/freebsd-13-stable/sys/dev/ath/ath_hal/ar5416/ |
H A D | ar5416_reset.c | 2319 regOffset = AR_PHY_BASE + (672 << 2) + regChainOffset;
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