Searched refs:AR_BEACON (Results 1 - 17 of 17) sorted by relevance
| /freebsd-13-stable/sys/dev/ath/ath_hal/ar5210/ |
| H A D | ar5210_beacon.c | 56 OS_REG_WRITE(ah, AR_BEACON, bt->bt_intval);
106 OS_REG_WRITE(ah, AR_BEACON, AR_BEACON_PERIOD);
158 OS_REG_WRITE(ah, AR_BEACON,
159 (OS_REG_READ(ah, AR_BEACON) &~ (AR_BEACON_PERIOD|AR_BEACON_TIM))
|
| H A D | ar5210_reset.c | 276 * Writing to AR_BEACON will start timers. Hence it should be
281 OS_REG_WRITE(ah, AR_BEACON,
282 (OS_REG_READ(ah, AR_BEACON) &
468 regBeacon = OS_REG_READ(ah, AR_BEACON);
469 OS_REG_WRITE(ah, AR_BEACON, regBeacon & ~AR_BEACON_EN);
565 OS_REG_WRITE(ah, AR_BEACON, regBeacon);
|
| H A D | ar5210_misc.c | 373 uint32_t val = OS_REG_READ(ah, AR_BEACON);
375 OS_REG_WRITE(ah, AR_BEACON, val | AR_BEACON_RESET_TSF);
|
| H A D | ar5210reg.h | 79 #define AR_BEACON 0x8024 /* Beacon control */ macro
|
| /freebsd-13-stable/sys/dev/ath/ath_hal/ar5211/ |
| H A D | ar5211_beacon.c | 59 OS_REG_WRITE(ah, AR_BEACON, bt->bt_intval);
115 OS_REG_WRITE(ah, AR_BEACON, AR_BEACON_PERIOD);
163 OS_REG_WRITE(ah, AR_BEACON,
164 (OS_REG_READ(ah, AR_BEACON) &~ (AR_BEACON_PERIOD|AR_BEACON_TIM))
|
| H A D | ar5211_misc.c | 369 uint32_t val = OS_REG_READ(ah, AR_BEACON);
371 OS_REG_WRITE(ah, AR_BEACON, val | AR_BEACON_RESET_TSF);
|
| H A D | ar5211_reset.c | 523 * Writing to AR_BEACON will start timers. Hence it should
528 OS_REG_WRITE(ah, AR_BEACON,
529 (OS_REG_READ(ah, AR_BEACON) &~ (AR_BEACON_EN | AR_BEACON_RESET_TSF)));
|
| H A D | ar5211reg.h | 248 #define AR_BEACON 0x8020 /* beacon control value/mode bits */ macro
|
| /freebsd-13-stable/sys/dev/ath/ath_hal/ar5212/ |
| H A D | ar5212_beacon.c | 77 OS_REG_WRITE(ah, AR_BEACON, AR_BEACON_RESET_TSF);
79 OS_REG_WRITE(ah, AR_BEACON, bt->bt_intval);
139 OS_REG_WRITE(ah, AR_BEACON, AR_BEACON_PERIOD);
186 OS_REG_WRITE(ah, AR_BEACON,
187 (OS_REG_READ(ah, AR_BEACON) &~ (AR_BEACON_PERIOD|AR_BEACON_TIM))
|
| H A D | ar5212_misc.c | 282 uint32_t val = OS_REG_READ(ah, AR_BEACON);
284 OS_REG_WRITE(ah, AR_BEACON, val | AR_BEACON_RESET_TSF);
292 OS_REG_WRITE(ah, AR_BEACON, val | AR_BEACON_RESET_TSF);
|
| H A D | ar5212_reset.c | 78 ( (((x) >= AR_BEACON) && ((x) <= AR_CFP_DUR)) || \
182 * bit in the AR_BEACON register; it also has the quirk
599 * Writing to AR_BEACON will start timers. Hence it should
604 OS_REG_WRITE(ah, AR_BEACON,
605 (OS_REG_READ(ah, AR_BEACON) &~ (AR_BEACON_EN | AR_BEACON_RESET_TSF)));
|
| H A D | ar5212reg.h | 263 #define AR_BEACON 0x8020 /* MAC beacon control value/mode bits */ macro
|
| /freebsd-13-stable/tools/tools/ath/common/ |
| H A D | dumpregs_5210.c | 82 DEFBASICfmt(AR_BEACON, "BEACON", AR_BEACON_BITS),
|
| H A D | dumpregs_5211.c | 245 DEFBASICfmt(AR_BEACON, "BEACON", AR_BEACON_BITS),
|
| H A D | dumpregs_5212.c | 283 DEFBASIC(AR_BEACON, "BEACON"),
|
| H A D | dumpregs_5416.c | 319 DEFBASIC(AR_BEACON, "BEACON"),
|
| /freebsd-13-stable/sys/dev/ath/ath_hal/ar5312/ |
| H A D | ar5312_reset.c | 62 ( (((x) >= AR_BEACON) && ((x) <= AR_CFP_DUR)) || \
145 * bit in the AR_BEACON register; it also has the quirk
523 * Writing to AR_BEACON will start timers. Hence it should
528 OS_REG_WRITE(ah, AR_BEACON,
529 (OS_REG_READ(ah, AR_BEACON) &~ (AR_BEACON_EN | AR_BEACON_RESET_TSF)));
|
Completed in 325 milliseconds