/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/VE/InstPrinter/ |
H A D | VEInstPrinter.cpp | 50 void VEInstPrinter::printOperand(const MCInst *MI, int opNum, argument 52 const MCOperand &MO = MI->getOperand(opNum); 74 void VEInstPrinter::printMemASXOperand(const MCInst *MI, int opNum, argument 79 printOperand(MI, opNum, STI, O); 81 printOperand(MI, opNum + 1, STI, O); 85 const MCOperand &MO = MI->getOperand(opNum + 1); 87 printOperand(MI, opNum + 1, STI, O); 90 printOperand(MI, opNum, STI, O); 94 void VEInstPrinter::printMemASOperand(const MCInst *MI, int opNum, argument 99 printOperand(MI, opNum, ST 114 printCCOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI, raw_ostream &O) argument [all...] |
H A D | VEInstPrinter.h | 36 void printOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI, 38 void printMemASXOperand(const MCInst *MI, int opNum, 41 void printMemASOperand(const MCInst *MI, int opNum, 44 void printCCOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI,
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/XCore/MCTargetDesc/ |
H A D | XCoreInstPrinter.h | 38 void printInlineJT(const MCInst *MI, int opNum, raw_ostream &O); 39 void printInlineJT32(const MCInst *MI, int opNum, raw_ostream &O); 41 void printMemOperand(const MCInst *MI, int opNum, raw_ostream &O);
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H A D | XCoreInstPrinter.cpp | 41 printInlineJT(const MCInst *MI, int opNum, raw_ostream &O) { argument 46 printInlineJT32(const MCInst *MI, int opNum, raw_ostream &O) { argument
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsInstPrinter.cpp | 143 void MipsInstPrinter::printUImm(const MCInst *MI, int opNum, raw_ostream &O) { argument 144 const MCOperand &MO = MI->getOperand(opNum); 154 printOperand(MI, opNum, O); 158 printMemOperand(const MCInst *MI, int opNum, raw_ostream &O) { argument 163 // opNum can be invalid if instruction had reglist as operand. 174 opNum = MI->getNumOperands() - 2; 178 printOperand(MI, opNum+1, O); 180 printOperand(MI, opNum, O); 185 printMemOperandEA(const MCInst *MI, int opNum, raw_ostream &O) { argument 188 printOperand(MI, opNum, 194 printFCCOperand(const MCInst *MI, int opNum, raw_ostream &O) argument 200 printSHFMask(const MCInst *MI, int opNum, raw_ostream &O) argument 280 printRegisterList(const MCInst *MI, int opNum, raw_ostream &O) argument [all...] |
H A D | MipsInstPrinter.h | 96 void printUImm(const MCInst *MI, int opNum, raw_ostream &O); 97 void printMemOperand(const MCInst *MI, int opNum, raw_ostream &O); 98 void printMemOperandEA(const MCInst *MI, int opNum, raw_ostream &O); 99 void printFCCOperand(const MCInst *MI, int opNum, raw_ostream &O); 100 void printSHFMask(const MCInst *MI, int opNum, raw_ostream &O); 108 void printRegisterList(const MCInst *MI, int opNum, raw_ostream &O);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Sparc/MCTargetDesc/ |
H A D | SparcInstPrinter.h | 43 void printOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI, 45 void printMemOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI, 47 void printCCOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI, 51 void printMembarTag(const MCInst *MI, int opNum, const MCSubtargetInfo &STI,
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H A D | SparcInstPrinter.cpp | 108 void SparcInstPrinter::printOperand(const MCInst *MI, int opNum, argument 111 const MCOperand &MO = MI->getOperand (opNum); 140 void SparcInstPrinter::printMemOperand(const MCInst *MI, int opNum, argument 143 printOperand(MI, opNum, STI, O); 148 printOperand(MI, opNum+1, STI, O); 151 const MCOperand &MO = MI->getOperand(opNum+1); 160 printOperand(MI, opNum+1, STI, O); 163 void SparcInstPrinter::printCCOperand(const MCInst *MI, int opNum, argument 166 int CC = (int)MI->getOperand(opNum).getImm(); 192 bool SparcInstPrinter::printGetPCX(const MCInst *MI, unsigned opNum, argument 199 printMembarTag(const MCInst *MI, int opNum, const MCSubtargetInfo &STI, raw_ostream &O) argument [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/XCore/ |
H A D | XCoreAsmPrinter.cpp | 63 void printInlineJT(const MachineInstr *MI, int opNum, raw_ostream &O, 65 void printInlineJT32(const MachineInstr *MI, int opNum, raw_ostream &O) { argument 66 printInlineJT(MI, opNum, O, ".jmptable32"); 68 void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O); 186 printInlineJT(const MachineInstr *MI, int opNum, raw_ostream &O, argument 188 unsigned JTI = MI->getOperand(opNum).getIndex(); 202 void XCoreAsmPrinter::printOperand(const MachineInstr *MI, int opNum, argument 205 const MachineOperand &MO = MI->getOperand(opNum);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsAsmPrinter.h | 151 void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O); 152 void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O); 153 void printMemOperandEA(const MachineInstr *MI, int opNum, raw_ostream &O); 154 void printFCCOperand(const MachineInstr *MI, int opNum, raw_ostream &O, 156 void printRegisterList(const MachineInstr *MI, int opNum, raw_ostream &O);
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H A D | MipsAsmPrinter.cpp | 661 void MipsAsmPrinter::printOperand(const MachineInstr *MI, int opNum, argument 663 const MachineOperand &MO = MI->getOperand(opNum); 727 printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O) { argument 732 // opNum can be invalid if instruction has reglist as operand. 739 opNum = MI->getNumOperands() - 2; 743 printOperand(MI, opNum+1, O); 745 printOperand(MI, opNum, O); 750 printMemOperandEA(const MachineInstr *MI, int opNum, raw_ostream &O) { argument 753 printOperand(MI, opNum, O); 755 printOperand(MI, opNum 759 printFCCOperand(const MachineInstr *MI, int opNum, raw_ostream &O, const char *Modifier) argument 766 printRegisterList(const MachineInstr *MI, int opNum, raw_ostream &O) argument [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcAsmPrinter.cpp | 51 void printOperand(const MachineInstr *MI, int opNum, raw_ostream &OS); 52 void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &OS, 291 void SparcAsmPrinter::printOperand(const MachineInstr *MI, int opNum, argument 294 const MachineOperand &MO = MI->getOperand (opNum); 382 void SparcAsmPrinter::printMemOperand(const MachineInstr *MI, int opNum, argument 384 printOperand(MI, opNum, O); 389 printOperand(MI, opNum+1, O); 393 if (MI->getOperand(opNum+1).isReg() && 394 MI->getOperand(opNum+1).getReg() == SP::G0) 396 if (MI->getOperand(opNum [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXAsmPrinter.h | 215 void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O, 232 void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O);
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H A D | NVPTXAsmPrinter.cpp | 2208 void NVPTXAsmPrinter::printOperand(const MachineInstr *MI, int opNum, argument 2210 const MachineOperand &MO = MI->getOperand(opNum); 2244 void NVPTXAsmPrinter::printMemOperand(const MachineInstr *MI, int opNum, argument 2246 printOperand(MI, opNum, O); 2250 printOperand(MI, opNum + 1, O); 2252 if (MI->getOperand(opNum + 1).isImm() && 2253 MI->getOperand(opNum + 1).getImm() == 0) 2256 printOperand(MI, opNum + 1, O);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
H A D | HexagonMCDuplexInfo.cpp | 664 unsigned opNum) { 665 if (Inst.getOperand(opNum).isReg()) { 666 switch (Inst.getOperand(opNum).getReg()) { 695 subInstPtr.addOperand(Inst.getOperand(opNum)); 699 subInstPtr.addOperand(Inst.getOperand(opNum)); 663 addOps(MCInst &subInstPtr, MCInst const &Inst, unsigned opNum) argument
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonVLIWPacketizer.cpp | 777 for (unsigned opNum = 0; opNum < MI.getNumOperands()-1; opNum++) { 778 const MachineOperand &MO = MI.getOperand(opNum);
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