Searched refs:modesIndex (Results 1 - 18 of 18) sorted by relevance

/freebsd-12-stable/sys/dev/ath/ath_hal/ar9002/
H A Dar9287_attach.c392 u_int modesIndex, freqIndex; local
400 modesIndex = 3;
402 modesIndex = 5;
404 modesIndex = 4;
409 modesIndex = 2;
411 modesIndex = 1;
418 regWrites = ath_hal_ini_write(ah, &AH5212(ah)->ah_ini_modes, modesIndex, regWrites);
419 regWrites = ath_hal_ini_write(ah, &AH9287(ah)->ah_ini_rxgain, modesIndex, regWrites);
420 regWrites = ath_hal_ini_write(ah, &AH9287(ah)->ah_ini_txgain, modesIndex, regWrites);
H A Dar9285_attach.c493 u_int modesIndex, freqIndex; local
500 modesIndex = 3;
502 modesIndex = 5;
504 modesIndex = 4;
510 modesIndex, regWrites);
513 modesIndex, regWrites);
H A Dar9280_attach.c496 u_int modesIndex, freqIndex; local
506 modesIndex = 3;
508 modesIndex = 5;
510 modesIndex = 4;
515 modesIndex = 2;
517 modesIndex = 1;
532 modesIndex, regWrites);
534 HALASSERT(modesIndex < ia->cols);
537 uint32_t val = HAL_INI_VAL(ia, i, modesIndex);
553 modesIndex, regWrite
[all...]
H A Dar9280.c48 ar9280WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, argument
235 uint16_t modesIndex, uint16_t *rfXpdGain)
234 ar9280SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, uint16_t modesIndex, uint16_t *rfXpdGain) argument
H A Dar9287.c48 ar9287WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, argument
177 uint16_t modesIndex, uint16_t *rfXpdGain)
176 ar9287SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, uint16_t modesIndex, uint16_t *rfXpdGain) argument
/freebsd-12-stable/sys/dev/ath/ath_hal/ar5212/
H A Dar5111.c65 ar5111WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, argument
68 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_5111, modesIndex, writes);
221 uint16_t modesIndex, uint16_t *rfXpdGain)
231 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",
232 __func__, chan->ic_freq, chan->ic_flags, modesIndex);
294 rfReg[i] = ar5212Bank0_5111[i][modesIndex];
305 HAL_INI_WRITE_ARRAY(ah, ar5212Bank2_5111, modesIndex, regWrites);
308 HAL_INI_WRITE_ARRAY(ah, ar5212Bank3_5111, modesIndex, regWrites);
312 rfReg[i] = ar5212Bank6_5111[i][modesIndex];
326 rfReg[i] = ar5212Bank7_5111[i][modesIndex];
220 ar5111SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, uint16_t modesIndex, uint16_t *rfXpdGain) argument
[all...]
H A Dar2316.c70 ar2316WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, argument
75 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2316, modesIndex, regWrites);
168 uint16_t modesIndex, uint16_t *rfXpdGain)
181 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",
182 __func__, chan->ic_freq, chan->ic_flags, modesIndex);
199 RF_BANK_SETUP(priv, 2, modesIndex);
202 RF_BANK_SETUP(priv, 3, modesIndex);
205 RF_BANK_SETUP(priv, 6, modesIndex);
211 RF_BANK_SETUP(priv, 7, modesIndex);
167 ar2316SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, uint16_t modesIndex, uint16_t *rfXpdGain) argument
H A Dar2317.c70 ar2317WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, argument
73 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2317, modesIndex, writes);
146 uint16_t modesIndex, uint16_t *rfXpdGain)
159 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",
160 __func__, chan->ic_freq, chan->ic_flags, modesIndex);
177 RF_BANK_SETUP(priv, 2, modesIndex);
180 RF_BANK_SETUP(priv, 3, modesIndex);
183 RF_BANK_SETUP(priv, 6, modesIndex);
189 RF_BANK_SETUP(priv, 7, modesIndex);
144 ar2317SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, uint16_t modesIndex, uint16_t *rfXpdGain) argument
H A Dar2413.c66 ar2413WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, argument
69 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2413, modesIndex, writes);
162 uint16_t modesIndex, uint16_t *rfXpdGain)
175 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",
176 __func__, chan->ic_freq, chan->ic_flags, modesIndex);
193 RF_BANK_SETUP(priv, 2, modesIndex);
196 RF_BANK_SETUP(priv, 3, modesIndex);
199 RF_BANK_SETUP(priv, 6, modesIndex);
205 RF_BANK_SETUP(priv, 7, modesIndex);
160 ar2413SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, uint16_t modesIndex, uint16_t *rfXpdGain) argument
H A Dar2425.c54 ar2425WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, argument
57 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2425, modesIndex, writes);
156 uint16_t modesIndex, uint16_t *rfXpdGain)
169 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",
170 __func__, chan->ic_freq, chan->ic_flags, modesIndex);
187 RF_BANK_SETUP(priv, 2, modesIndex);
190 RF_BANK_SETUP(priv, 3, modesIndex);
193 RF_BANK_SETUP(priv, 6, modesIndex);
199 RF_BANK_SETUP(priv, 7, modesIndex);
154 ar2425SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, uint16_t modesIndex, uint16_t *rfXpdGain) argument
H A Dar5112.c66 ar5112WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, argument
69 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_5112, modesIndex, writes);
182 uint16_t modesIndex, uint16_t *rfXpdGain)
201 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",
202 __func__, chan->ic_freq, chan->ic_flags, modesIndex);
248 RF_BANK_SETUP(priv, 2, modesIndex);
251 RF_BANK_SETUP(priv, 3, modesIndex);
254 RF_BANK_SETUP(priv, 6, modesIndex);
304 RF_BANK_SETUP(priv, 7, modesIndex);
180 ar5112SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, uint16_t modesIndex, uint16_t *rfXpdGain) argument
H A Dar5413.c66 ar5413WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, argument
69 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_5413, modesIndex, writes);
161 uint16_t modesIndex, uint16_t *rfXpdGain)
176 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",
177 __func__, chan->ic_freq, chan->ic_flags, modesIndex);
219 RF_BANK_SETUP(priv, 2, modesIndex);
222 RF_BANK_SETUP(priv, 3, modesIndex);
225 RF_BANK_SETUP(priv, 6, modesIndex);
247 RF_BANK_SETUP(priv, 7, modesIndex);
159 ar5413SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, uint16_t modesIndex, uint16_t *rfXpdGain) argument
H A Dar5212_reset.c135 u_int modesIndex, freqIndex; local
271 modesIndex = 5;
273 modesIndex = 4;
275 modesIndex = 3;
285 modesIndex = 2;
287 modesIndex = 1;
301 regWrites = ath_hal_ini_write(ah, &ahp->ah_ini_modes, modesIndex, 0);
312 ahp->ah_rfHal->writeRegs(ah, modesIndex, freqIndex, regWrites);
400 if (!ahp->ah_rfHal->setRfRegs(ah, chan, modesIndex, rfXpdGain)) {
H A Dar5212.h142 const struct ieee80211_channel *, uint16_t modesIndex,
/freebsd-12-stable/sys/dev/ath/ath_hal/ar5312/
H A Dar5312_reset.c106 u_int modesIndex, freqIndex; local
219 modesIndex = IEEE80211_IS_CHAN_108G(chan) ? 5 :
223 modesIndex = IEEE80211_IS_CHAN_ST(chan) ? 2 : 1;
231 regWrites = ath_hal_ini_write(ah, &ahp->ah_ini_modes, modesIndex, 0);
234 ahp->ah_rfHal->writeRegs(ah, modesIndex, freqIndex, regWrites);
322 if (!ahp->ah_rfHal->setRfRegs(ah, chan, modesIndex, rfXpdGain)) {
/freebsd-12-stable/sys/dev/ath/ath_hal/ar5416/
H A Dar5416_attach.c587 u_int modesIndex, freqIndex; local
595 modesIndex = 3;
597 modesIndex = 5;
599 modesIndex = 4;
604 modesIndex = 2;
606 modesIndex = 1;
626 modesIndex, regWrites);
631 AH5212(ah)->ah_rfHal->writeRegs(ah, modesIndex, freqIndex, regWrites);
H A Dar2133.c55 ar2133WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, argument
260 uint16_t modesIndex, uint16_t *rfXpdGain)
277 ath_hal_ini_bank_setup(priv->Bank3Data, &AH5416(ah)->ah_ini_bank3, modesIndex);
280 ath_hal_ini_bank_setup(priv->Bank6Data, &AH5416(ah)->ah_ini_bank6, modesIndex);
259 ar2133SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, uint16_t modesIndex, uint16_t *rfXpdGain) argument
/freebsd-12-stable/sys/dev/ath/ath_hal/ar5211/
H A Dar5211_reset.c173 uint16_t modesIndex = 0, freqIndex = 0; local
261 modesIndex = 2;
263 modesIndex = 1;
273 modesIndex = 3;
275 modesIndex = 4;
325 OS_REG_WRITE(ah, ar5211Modes[i][0], ar5211Modes[i][modesIndex]);

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