Searched refs:mayStore (Results 1 - 25 of 80) sorted by relevance

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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZInstrBuilder.h34 if (MCID.mayStore())
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMOptimizeBarriersPass.cpp44 MI->mayStore() ||
H A DARMHazardRecognizer.cpp23 if (MI->mayStore())
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCOptAddrMode.cpp295 if (Ldst->mayStore() && Ldst->getOperand(0).isReg()) {
395 bool IsStore = Ldst->mayStore();
399 if (MI->mayStore() || MI->isCall() || MI->isInlineAsm() ||
423 bool IsStore = Ldst->mayStore();
430 if (MI->mayStore() || MI->isCall() || MI->isInlineAsm() ||
444 bool IsStore = Ldst.mayStore();
473 if (!MI->mayLoad() && !MI->mayStore())
/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DImplicitNullChecks.cpp328 if (!(PrevMI->mayStore() || PrevMI->mayLoad()))
331 if (!(MI.mayStore() || PrevMI->mayStore()))
336 return MI.mayStore() ? AR_WillAliasEverything : AR_MayAlias;
338 return PrevMI->mayStore() ? AR_WillAliasEverything : AR_MayAlias;
634 MI->mayStore() ? FaultMaps::FaultingLoadStore : FaultMaps::FaultingLoad;
H A DMIRVRegNamerUtils.cpp134 if (Candidate.mayStore() || Candidate.isBranch())
H A DLiveRangeShrink.cpp135 if (MI.mayStore())
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIMemoryLegalizer.cpp579 if (!(MI->mayLoad() && !MI->mayStore()))
593 if (!(!MI->mayLoad() && MI->mayStore()))
640 if (!(MI->mayLoad() && MI->mayStore()))
669 assert(MI->mayLoad() && !MI->mayStore());
703 assert(MI->mayLoad() ^ MI->mayStore());
903 assert(MI->mayLoad() && !MI->mayStore());
944 assert(MI->mayLoad() ^ MI->mayStore());
1137 assert(MI->mayLoad() && !MI->mayStore());
1182 assert(!MI->mayLoad() && MI->mayStore());
1247 assert(MI->mayLoad() && MI->mayStore());
[all...]
H A DSIAddIMGInit.cpp78 if (TII->isMIMG(Opcode) && !MI.mayStore()) {
H A DSIInsertWaitcnts.cpp542 if (TII->isDS(Inst) && (Inst.mayStore() || Inst.mayLoad())) {
551 if (Inst.mayStore()) {
583 if (Inst.mayStore()) {
595 if (Inst.mayStore()) {
604 if (Inst.mayStore()) {
608 if (Inst.mayStore()) {
660 if (TII->isDS(Inst) && Inst.mayStore()) {
1018 if (MI.mayStore()) {
1260 (TII->isMIMG(Inst) && !Inst.mayLoad() && !Inst.mayStore()))
1262 else if (Inst.mayStore())
[all...]
/freebsd-12-stable/contrib/llvm-project/llvm/tools/llvm-mca/Views/
H A DInstructionInfoView.cpp82 TempStream << (MCDesc.mayStore() ? " * " : " ");
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonOptAddrMode.cpp129 if ((!MID.mayStore() && !MID.mayLoad()) || HII->isPredicated(MI))
132 if (MID.mayStore()) {
195 if ((!UseMID.mayLoad() && !UseMID.mayStore()) ||
201 if (UseMID.mayStore() && UseMI.getOperand(2).isReg() &&
358 if ((!MID.mayLoad() && !MID.mayStore()) ||
445 if ((MID.mayLoad() || MID.mayStore())) {
648 } else if (UseMID.mayStore()) {
676 else if (MID.mayStore())
H A DHexagonVectorPrint.cpp116 if (MI.mayStore() && MI.getNumOperands() >= 3 && MI.getOperand(2).isReg()) {
122 if (MI.mayStore() && MI.getNumOperands() >= 4 && MI.getOperand(3).isReg()) {
H A DHexagonHazardRecognizer.cpp157 if (TII->isHVXVec(*MI) && !MI->mayLoad() && !MI->mayStore())
H A DHexagonSubtarget.cpp148 bool IsStoreMI1 = MI1.mayStore();
158 if ((IsStoreMI1 && MI2.mayStore()) || (IsLoadMI1 && MI2.mayLoad())) {
274 if (!L0.mayLoad() || L0.mayStore() ||
287 if (!L1.mayLoad() || L1.mayStore() ||
H A DHexagonVLIWPacketizer.cpp358 if (HII->isHVXVec(MI) && MI.mayStore())
591 if (MI.getDesc().mayStore()) {
599 llvm_unreachable("mayLoad or mayStore not set for Post Increment operation");
667 if (PacketSU->getInstr()->mayStore())
1110 if (HII.isNewValueStore(MI) && MJ.mayStore())
1289 bool StoreI = I.mayStore(), StoreJ = J.mayStore();
1374 if (PI->getOpcode() == Hexagon::S2_allocframe || PI->mayStore() ||
1516 bool LoadJ = J.mayLoad(), StoreJ = J.mayStore();
1517 bool LoadI = I.mayLoad(), StoreI = I.mayStore();
[all...]
H A DRDFDeadCode.cpp59 if (MI->mayStore() || MI->isBranch() || MI->isCall() || MI->isReturn())
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonShuffler.cpp156 setStore(HexagonMCInstrInfo::getDesc(MCII, *id).mayStore());
270 if (HexagonMCInstrInfo::getDesc(MCII, Inst).mayStore()) {
387 assert(HexagonMCInstrInfo::getDesc(MCII, ID).mayStore());
471 if (HexagonMCInstrInfo::getDesc(MCII, ID).mayStore()) {
H A DHexagonShuffler.h101 bool mayStore() const { return Store; } function in class:llvm::HexagonCVIResource
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCHazardRecognizers.cpp40 if (!PredMCID || !PredMCID->mayStore())
285 isStore = MCID.mayStore();
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsDelaySlotFiller.cpp457 if (!MI.mayStore() && !MI.mayLoad())
466 SeenStore |= MI.mayStore();
479 if (MI.mayStore())
505 HasHazard |= updateDefsUses(VT, MI.mayStore());
510 HasHazard = MI.mayStore() && (OrigSeenLoad || OrigSeenStore);
514 SeenNoObjStore |= MI.mayStore();
/freebsd-12-stable/contrib/llvm-project/llvm/lib/MCA/
H A DInstrBuilder.cpp384 // FIXME: if an instruction opcode is flagged 'mayStore', and it has no
391 bool AssumeUsesOnly = MCDesc.mayStore() && !MCDesc.mayLoad() &&
463 bool AssumeDefsOnly = !MCDesc.mayStore() && MCDesc.mayLoad() &&
566 ID->MayStore = MCDesc.mayStore();
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCInstrDesc.h442 bool mayStore() const { return Flags & (1ULL << MCID::MayStore); } function in class:llvm::MCInstrDesc
455 /// 2. Memory accesses. Use mayLoad/mayStore.
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiDelaySlotFiller.cpp192 if (MI->mayStore()) {
/freebsd-12-stable/contrib/llvm-project/llvm/utils/TableGen/
H A DCodeGenInstruction.h252 bool mayStore : 1;

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