/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/BPF/MCTargetDesc/ |
H A D | BPFInstPrinter.cpp | 57 } else if (Op.isImm()) { 75 if (OffsetOp.isImm()) { 89 if (Op.isImm()) 100 if (Op.isImm()) {
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H A D | BPFMCCodeEmitter.cpp | 92 if (MO.isImm()) 139 uint64_t Imm = MO.isImm() ? MO.getImm() : 0; 167 assert(Op2.isImm() && "Second operand is not immediate.");
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64MCCodeEmitter.cpp | 207 assert(MO.isImm() && "did not expect relocated expression"); 218 if (MO.isImm()) 239 if (MO.isImm()) 270 if (MO.isImm()) 301 if (MO.isImm()) 323 if (MO.isImm()) 351 if (MO.isImm()) 371 if (MO.isImm()) 393 if (MO.isImm()) 419 assert(MO.isImm() [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMMCTargetDesc.cpp | 40 (MI.getOperand(0).isImm() && MI.getOperand(0).getImm() == 15) && 41 (MI.getOperand(1).isImm() && MI.getOperand(1).getImm() == 0) && 44 (MI.getOperand(3).isImm() && MI.getOperand(3).getImm() == 7)) { 45 if ((MI.getOperand(5).isImm() && MI.getOperand(5).getImm() == 4)) { 46 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 5) { 53 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 10) { 60 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 10 && 61 (MI.getOperand(5).isImm() && MI.getOperand(5).getImm() == 5)) { 71 if (STI.getFeatureBits()[llvm::ARM::HasV8Ops] && MI.getOperand(1).isImm() &&
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/ |
H A D | LanaiMCCodeEmitter.cpp | 114 if (MCOp.isImm()) 145 ((Op2.isImm() && Op2.getImm() != 0) || 153 if (LPAC::modifiesOp(AluCode) && ((Op2.isImm() && Op2.getImm() != 0) || 194 assert((Op2.isImm() || Op2.isExpr()) && 200 if (Op2.isImm()) { 230 assert(AluMCOp.isImm() && "Third operator is not immediate."); 265 assert((Op2.isImm() || Op2.isExpr()) && 271 if (Op2.isImm()) { 292 if (MCOp.isReg() || MCOp.isImm())
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H A D | LanaiInstPrinter.cpp | 155 else if (Op.isImm()) 166 if (Op.isImm()) { 180 if (Op.isImm()) { 192 if (Op.isImm()) { 204 if (Op.isImm()) { 229 assert((OffsetOp.isImm() || OffsetOp.isExpr()) && "Immediate expected"); 230 if (OffsetOp.isImm()) {
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AVR/MCTargetDesc/ |
H A D | AVRInstPrinter.cpp | 116 } else if (Op.isImm()) { 130 if (Op.isImm()) { 156 if (OffsetOp.isImm()) {
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H A D | AVRMCCodeEmitter.cpp | 104 assert(MO.isImm()); 157 if (OffsetOp.isImm()) { 174 assert(MI.getOperand(OpNo).isImm()); 201 assert(MO.isImm()); 216 assert(MO.isImm()); 255 if (MO.isImm()) return static_cast<unsigned>(MO.getImm());
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/MSP430/MCTargetDesc/ |
H A D | MSP430InstPrinter.cpp | 40 if (Op.isImm()) { 58 } else if (Op.isImm()) { 87 assert(Disp.isImm() && "Expected immediate in displacement field");
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H A D | MSP430MCCodeEmitter.cpp | 108 if (MO.isImm()) { 128 if (MO2.isImm()) { 156 if (MO.isImm()) 169 assert(MO.isImm() && "Expr operand expected"); 188 assert(MO.isImm() && "Immediate operand expected");
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
H A D | PPCMCCodeEmitter.cpp | 47 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); 59 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); 72 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); 85 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); 97 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); 114 if (MO.isImm()) 132 if (MO.isImm()) 150 if (MO.isImm()) { 172 assert(MO.isImm()); 187 assert(MO.isImm()); [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/VE/InstPrinter/ |
H A D | VEInstPrinter.cpp | 59 if (MO.isImm()) { 86 if (!MO.isImm() || MO.getImm() != 0) { 106 if (!MO.isImm() || MO.getImm() != 0) {
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARC/MCTargetDesc/ |
H A D | ARCInstPrinter.cpp | 148 if (Op.isImm()) { 162 assert(offset.isImm() && "Offset should be immediate."); 171 assert(Op.isImm() && "Predicate operand is immediate."); 178 assert(Op.isImm() && "Predicate operand is immediate.");
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/MC/ |
H A D | MCInst.cpp | 26 else if (isImm()) 40 if (isImm()) {
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsMCCodeEmitter.cpp | 62 assert(Inst.getOperand(2).isImm()); 242 if (MO.isImm()) return MO.getImm() >> 2; 264 if (MO.isImm()) return MO.getImm() >> 1; 286 if (MO.isImm()) 309 if (MO.isImm()) 332 if (MO.isImm()) return MO.getImm() >> 1; 353 if (MO.isImm()) return MO.getImm() >> 1; 374 if (MO.isImm()) return MO.getImm() >> 1; 396 if (MO.isImm()) return MO.getImm() >> 2; 418 if (MO.isImm()) retur [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiMemAluCombiner.cpp | 186 (Op.isImm() && Op.getImm() == 0)); 247 assert((AluOffset.isReg() || AluOffset.isImm()) && 252 unsigned NewOpc = mergedOpcode(MemInstr->getOpcode(), AluOffset.isImm()); 266 else if (AluOffset.isImm()) 301 if (Op2.isImm()) { 310 if (Offset.isImm() && 375 assert(AluOperand.isImm() && "Unexpected memory operator type");
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Sparc/MCTargetDesc/ |
H A D | SparcMCCodeEmitter.cpp | 130 if (MO.isImm()) 154 if (MO.isReg() || MO.isImm()) 189 if (MO.isReg() || MO.isImm()) 202 if (MO.isReg() || MO.isImm()) 215 if (MO.isReg() || MO.isImm())
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/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/MC/MCParser/ |
H A D | MCParsedAsmOperand.h | 56 /// isImm - Is this an immediate operand? 57 virtual bool isImm() const = 0;
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUGlobalISelUtils.cpp | 25 if (Op.isImm())
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H A D | SIFoldOperands.cpp | 48 if (FoldOp->isImm()) { 62 bool isImm() const { function in struct:__anon5014::FoldCandidate 192 if (Fold.isImm()) { 240 if ((Fold.isImm() || Fold.isFI() || Fold.isGlobal()) && Fold.needsShrink()) { 284 if (Fold.isImm()) { 358 if (Opc == AMDGPU::S_SETREG_B32 && OpToFold->isImm()) { 402 (OpToFold->isImm() || OpToFold->isFI() || OpToFold->isGlobal())) { 439 if (OpToFold->isImm()) { 487 if (Op->isImm()) { 518 if (OpToFold.isImm() [all...] |
H A D | GCNDPPCombine.cpp | 149 if (Op1.isImm()) 265 assert(OldOpnd->isImm()); 322 if (!CombBCZ && OldOpndValue && OldOpndValue->isImm()) { 349 assert(Imm->isImm()); 371 assert(RowMaskOpnd && RowMaskOpnd->isImm()); 373 assert(BankMaskOpnd && BankMaskOpnd->isImm()); 378 assert(BCZOpnd && BCZOpnd->isImm()); 392 // We could use: assert(!OldOpndValue || OldOpndValue->isImm()) 395 assert(!OldOpndValue || OldOpndValue->isImm() || OldOpndValue == OldOpnd); 402 if (!OldOpndValue || !OldOpndValue->isImm()) { [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Lanai/AsmParser/ |
H A D | LanaiAsmParser.cpp | 160 assert(isImm() && "Invalid type access!"); 192 bool isImm() const override { return Kind == IMMEDIATE; } 209 if (!isImm()) 223 bool isCallTarget() { return isImm() || isToken(); } 226 if (!isImm()) 249 if (!isImm()) 262 if (!isImm()) 286 if (!isImm()) 310 if (!isImm()) 323 if (!isImm()) [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Sparc/Disassembler/ |
H A D | SparcDisassembler.cpp | 375 bool isImm = fieldFromInstruction(insn, 13, 1); local 380 if (isImm) 398 if (isImm) 532 unsigned isImm = fieldFromInstruction(insn, 13, 1); local 535 if (isImm) 551 if (isImm) 565 unsigned isImm = fieldFromInstruction(insn, 13, 1); local 568 if (isImm) 579 if (isImm) 594 unsigned isImm local 633 unsigned isImm = fieldFromInstruction(insn, 13, 1); local [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/RISCV/AsmParser/ |
H A D | RISCVAsmParser.cpp | 276 bool isImm() const override { return Kind == KindTy::Immediate; } 306 if (!isImm()) 323 if (!isImm() || evaluateConstantImm(getImm(), Imm, VK)) 333 if (!isImm() || evaluateConstantImm(getImm(), Imm, VK)) 344 if (!isImm() || evaluateConstantImm(getImm(), Imm, VK)) 355 if (!isImm()) 379 if (!isImm()) 394 if (!isImm()) 408 if (!isImm()) 419 if (!isImm()) [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86InstComments.cpp | 523 if (MI->getOperand(NumOperands - 1).isImm()) 539 if (MI->getOperand(NumOperands - 1).isImm()) 555 if (MI->getOperand(NumOperands - 1).isImm()) 569 if (MI->getOperand(NumOperands - 1).isImm()) 587 if (MI->getOperand(NumOperands - 1).isImm()) 681 if (MI->getOperand(NumOperands - 1).isImm()) 699 if (MI->getOperand(NumOperands - 1).isImm()) 713 if (MI->getOperand(NumOperands - 1).isImm()) 731 if (MI->getOperand(NumOperands - 1).isImm()) 749 if (MI->getOperand(NumOperands - 1).isImm()) [all...] |