Searched refs:ctl_reg (Results 1 - 6 of 6) sorted by relevance

/freebsd-12-stable/sys/dev/wbwd/
H A Dwbwd.c104 uint8_t ctl_reg; member in struct:wb_softc
257 sbuf_printf(&sb, "CR%02X 0x%02x ", sc->ctl_reg, sc->reg_1);
278 sc->reg_1 = superio_read(sc->dev, sc->ctl_reg);
357 sc->ctl_reg, sc->reg_1, sc->csr_reg, sc->reg_2);
391 sc->reg_1 = superio_read(sc->dev, sc->ctl_reg);
413 superio_write(sc->dev, sc->ctl_reg, sc->reg_1);
517 sc->ctl_reg = 0xf3;
522 sc->ctl_reg = 0xf0;
527 sc->ctl_reg = 0xf5;
558 t = superio_read(dev, sc->ctl_reg);
[all...]
/freebsd-12-stable/sys/amd64/vmm/intel/
H A Dvmx_msr.h47 int vmx_set_ctlreg(int ctl_reg, int true_ctl_reg, uint32_t ones_mask,
H A Dvmx_msr.c82 vmx_set_ctlreg(int ctl_reg, int true_ctl_reg, uint32_t ones_mask, argument
95 val = rdmsr(ctl_reg);
107 "truectl 0x%0x\n", i, ctl_reg, true_ctl_reg));
131 "0x%0x and true msr 0x%0x", i, ctl_reg,
/freebsd-12-stable/sys/dev/drm2/i915/
H A Dintel_lvds.c104 u32 ctl_reg, lvds_reg, stat_reg; local
107 ctl_reg = PCH_PP_CONTROL;
111 ctl_reg = PP_CONTROL;
134 I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
147 u32 ctl_reg, lvds_reg, stat_reg; local
150 ctl_reg = PCH_PP_CONTROL;
154 ctl_reg = PP_CONTROL;
161 I915_WRITE(ctl_reg, I915_READ(ctl_reg)
[all...]
H A Dintel_hdmi.c298 u32 ctl_reg = HSW_TVIDEO_DIP_CTL(intel_crtc->pipe); local
301 u32 val = I915_READ(ctl_reg);
307 I915_WRITE(ctl_reg, val);
320 I915_WRITE(ctl_reg, val);
321 POSTING_READ(ctl_reg);
/freebsd-12-stable/sys/dev/cxgbe/common/
H A Dt4_hw.c346 u32 ctl_reg = PF_REG(mbox, A_CIM_PF_MAILBOX_CTRL); local
363 ctl_reg = VF_CIM_REG(A_CIM_VF_EXT_MAILBOX_CTRL);
378 ctl = t4_read_reg(adap, ctl_reg);
429 t4_write_reg(adap, ctl_reg, F_MBMSGVALID | V_MBOWNER(X_MBOWNER_FW));
461 v = t4_read_reg(adap, ctl_reg);
466 t4_write_reg(adap, ctl_reg,
476 t4_write_reg(adap, ctl_reg, V_MBOWNER(X_MBOWNER_NONE));

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