Searched refs:cpsr (Results 1 - 25 of 34) sorted by relevance

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/freebsd-12-stable/sys/arm/arm/
H A Dsetcpsr.S61 mrs r3, cpsr /* Set the CPSR */
78 mrs r0, cpsr /* Get the CPSR */
H A Dsetstack.s65 mrs r3, cpsr /* Switch to the appropriate mode */
84 mrs r3, cpsr /* Switch to the appropriate mode */
H A Dfiq_subr.S56 mrs r2, cpsr ; \
H A Dcpufunc_asm_sheeva.S46 mrs r2, cpsr
71 mrs lr, cpsr
114 mrs lr, cpsr
166 mrs lr, cpsr
209 mrs lr, cpsr
252 mrs lr, cpsr
297 mrs lr, cpsr
340 mrs lr, cpsr
384 mrs r1, cpsr
H A Dexception.S155 mrs r2, cpsr; /* Get the CPSR */ \
193 mrs r2, cpsr; /* Get the CPSR */ \
255 mrs r4, cpsr; /* save CPSR */ \
424 mrs r8, cpsr /* FIQ handling isn't supported, */
437 mrs r1, cpsr
H A Dlocore-v4.S95 mrs r7, cpsr
380 mrs r2, cpsr
H A Dlocore-v6.S65 mrs r0, cpsr ;\
75 mrs r0, cpsr ;\
/freebsd-12-stable/contrib/llvm-project/lldb/source/Plugins/Architecture/Arm/
H A DArchitectureArm.cpp77 const uint32_t cpsr = reg_ctx_sp->GetFlags(0); local
78 if (cpsr == 0)
82 const uint32_t J = Bit32(cpsr, 24);
83 const uint32_t T = Bit32(cpsr, 5);
105 if (!ARMConditionPassed(condition, cpsr))
116 const uint32_t ITSTATE = Bits32(cpsr, 15, 10) << 2 | Bits32(cpsr, 26, 25);
119 if (!ARMConditionPassed(condition, cpsr)) {
/freebsd-12-stable/contrib/llvm-project/lldb/source/Plugins/Process/Utility/
H A DARMDefines.h108 const uint32_t cpsr) {
109 const uint32_t cpsr_n = (cpsr >> 31) & 1u; // Negative condition code flag
110 const uint32_t cpsr_z = (cpsr >> 30) & 1u; // Zero condition code flag
111 const uint32_t cpsr_c = (cpsr >> 29) & 1u; // Carry condition code flag
112 const uint32_t cpsr_v = (cpsr >> 28) & 1u; // Overflow condition code flag
107 ARMConditionPassed(const uint32_t condition, const uint32_t cpsr) argument
H A DRegisterInfoPOSIX_arm.h20 uint32_t cpsr; // CPSR member in struct:RegisterInfoPOSIX_arm::GPR
H A DRegisterInfoPOSIX_arm64.h25 uint32_t cpsr; // cpsr member in struct:RegisterInfoPOSIX_arm64::GPR
H A DRegisterContextDarwin_arm.h91 uint32_t cpsr; // CPSR member in struct:RegisterContextDarwin_arm::GPR
H A DRegisterContextDarwin_arm64.h72 uint32_t cpsr; // cpsr member in struct:RegisterContextDarwin_arm64::GPR
H A DRegisterContextDarwin_arm64.cpp351 value.SetUInt64(gpr.cpsr);
773 case arm64_dwarf::cpsr:
912 case arm64_ehframe::cpsr:
H A DRegisterInfos_arm64.h480 // Generates register kinds array for cpsr
483 arm64_ehframe::cpsr, arm64_dwarf::cpsr, LLDB_REGNUM_GENERIC_FLAGS, \
532 // Defines miscellaneous status and control registers like cpsr, fpsr etc
578 DEFINE_MISC_REGS(cpsr, 4, GPR, gpr_cpsr),
/freebsd-12-stable/contrib/llvm-project/lldb/source/Utility/
H A DARM64_DWARF_Registers.h53 cpsr = 33, enumerator in enum:arm64_dwarf::__anon4083
H A DARM64_ehframe_Registers.h52 cpsr enumerator in enum:arm64_ehframe::__anon4084
/freebsd-12-stable/sys/arm/mv/armadaxp/
H A Dmptramp.S38 mrs r3, cpsr
/freebsd-12-stable/contrib/llvm-project/lldb/source/Plugins/Process/minidump/
H A DRegisterContextMinidump_ARM.h75 uint32_t cpsr; member in struct:lldb_private::minidump::RegisterContextMinidump_ARM::Context
H A DRegisterContextMinidump_ARM64.h64 uint32_t cpsr; member in struct:lldb_private::minidump::RegisterContextMinidump_ARM64::Context
H A DRegisterContextMinidump_ARM64.cpp387 {"cpsr",
390 OFFSET(cpsr),
393 {INV, arm64_dwarf::cpsr, LLDB_REGNUM_GENERIC_FLAGS, INV, reg_cpsr},
779 m_regs.cpsr = data.GetU32(&offset);
H A DRegisterContextMinidump_ARM.cpp244 {"cpsr",
247 OFFSET(cpsr),
473 m_regs.cpsr = data.GetU32(&offset);
/freebsd-12-stable/sys/cddl/dev/dtrace/arm/
H A Ddtrace_asm.S58 mrs r0, cpsr
70 mrs r1, cpsr
/freebsd-12-stable/sys/xen/interface/
H A Darch-arm.h259 uint32_t cpsr; /* SPSR_EL2 */ member in struct:vcpu_guest_core_regs
/freebsd-12-stable/sys/dev/cx/
H A Dcxddk.h202 unsigned char cpsr; /* CRC polynomial select */ member in struct:__anon12575

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