Searched refs:Zero32 (Results 1 - 6 of 6) sorted by relevance
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZTDC.cpp | 346 Value *Zero32 = ConstantInt::get(Type::getInt32Ty(Ctx), 0); local 364 Value *ICmp = IRB.CreateICmp(CmpInst::ICMP_NE, TDC, Zero32);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86InstructionSelector.cpp | 1653 Register Zero32 = MRI.createVirtualRegister(&X86::GR32RegClass); local 1655 Zero32); 1663 .addReg(Zero32, 0, X86::sub_16bit); 1667 .addReg(Zero32); 1672 .addReg(Zero32)
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H A D | X86FastISel.cpp | 1952 unsigned Zero32 = createResultReg(&X86::GR32RegClass); local 1954 TII.get(X86::MOV32r0), Zero32); 1962 .addReg(Zero32, 0, X86::sub_16bit); 1966 .addReg(Zero32); 1970 .addImm(0).addReg(Zero32).addImm(X86::sub_32bit);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/ |
H A D | GCOVProfiling.cpp | 1028 Constant *Zero32 = Builder.getInt32(0); 1030 Constant *TwoZero32s[] = {Zero32, Zero32};
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPULegalizerInfo.cpp | 1456 const auto Zero32 = B.buildConstant(S32, 0); 1459 auto SignBit64 = B.buildMerge(S64, {Zero32.getReg(0), SignBit.getReg(0)}); 1466 auto ExpLt0 = B.buildICmp(CmpInst::ICMP_SLT, S1, Exp, Zero32);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | LegalizerHelper.cpp | 3858 auto Zero32 = MIRBuilder.buildConstant(S32, 0); local 3867 auto E = MIRBuilder.buildSelect(S32, NotZero, Sub, Zero32); 3887 auto Select0 = MIRBuilder.buildSelect(S32, TCmp, VTrunc1, Zero32);
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