/freebsd-12-stable/crypto/openssl/crypto/seed/ |
H A D | seed_local.h | 57 # define KEYSCHEDULE_UPDATE0(T0, T1, X1, X2, X3, X4, KC) \ 59 (X3) = (((X3)<<8) ^ ((X4)>>24)) & 0xffffffff; \ 60 (X4) = (((X4)<<8) ^ ((T0)>>24)) & 0xffffffff; \ 62 (T1) = ((X2) + (KC) - (X4)) & 0xffffffff 64 # define KEYSCHEDULE_UPDATE1(T0, T1, X1, X2, X3, X4, KC) \ 69 (T1) = ((X2) + (KC) - (X4)) & 0xffffffff 99 # define E_SEED(T0, T1, X1, X2, X3, X4, rbase) \ 101 (T1) = (X4) ^ (ks->data)[(rbase)+1]; \
|
/freebsd-12-stable/contrib/llvm-project/compiler-rt/lib/xray/ |
H A D | xray_trampoline_AArch64.S | 22 STP X3, X4, [SP, #-16]! 49 LDP X3, X4, [SP], #16 69 STP X3, X4, [SP, #-16]! 89 LDP X3, X4, [SP], #16 109 STP X3, X4, [SP, #-16]! 140 LDP X3, X4, [SP], #16
|
/freebsd-12-stable/contrib/libstdc++/include/ext/ |
H A D | typelist.h | 317 #define _GLIBCXX_TYPELIST_CHAIN5(X0, X1, X2, X3, X4) __gnu_cxx::typelist::chain<X0, _GLIBCXX_TYPELIST_CHAIN4(X1, X2, X3, X4) > 318 #define _GLIBCXX_TYPELIST_CHAIN6(X0, X1, X2, X3, X4, X5) __gnu_cxx::typelist::chain<X0, _GLIBCXX_TYPELIST_CHAIN5(X1, X2, X3, X4, X5) > 319 #define _GLIBCXX_TYPELIST_CHAIN7(X0, X1, X2, X3, X4, X5, X6) __gnu_cxx::typelist::chain<X0, _GLIBCXX_TYPELIST_CHAIN6(X1, X2, X3, X4, X5, X6) > 320 #define _GLIBCXX_TYPELIST_CHAIN8(X0, X1, X2, X3, X4, X5, X6, X7) __gnu_cxx::typelist::chain<X0, _GLIBCXX_TYPELIST_CHAIN7(X1, X2, X3, X4, X5, X6, X7) > 321 #define _GLIBCXX_TYPELIST_CHAIN9(X0, X1, X2, X3, X4, X5, X6, X7, X8) __gnu_cxx::typelist::chain<X0, _GLIBCXX_TYPELIST_CHAIN8(X1, X2, X3, X4, X [all...] |
/freebsd-12-stable/lib/libc/sparc64/fpu/ |
H A D | fpu.c | 101 #define X4(x) x,x,x,x macro 102 #define X8(x) X4(x),X4(x) 108 X4(FSR_UF),
|
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVRegisterInfo.cpp | 82 markSuperRegs(Reserved, RISCV::X4); // tp
|
H A D | RISCVISelLowering.cpp | 544 SDValue TPReg = DAG.getRegister(RISCV::X4, XLenVT); 560 SDValue TPReg = DAG.getRegister(RISCV::X4, XLenVT); 2626 .Case("{tp}", RISCV::X4)
|
/freebsd-12-stable/sys/crypto/skein/ |
H A D | skein_block.c | 268 u64b_t X0,X1,X2,X3,X4,X5,X6,X7; /* local copy of vars, for speed */ local 273 Xptr[4] = &X4; Xptr[5] = &X5; Xptr[6] = &X6; Xptr[7] = &X7; 305 X4 = w[4] + ks[4]; 330 X4 += ks[((R)+5) % 9]; \ 345 X4 += ks[r+(R)+4]; \ 424 ctx->X[4] = X4 ^ w[4];
|
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64CallingConvention.cpp | 24 AArch64::X3, AArch64::X4, AArch64::X5,
|
H A D | AArch64FastISel.cpp | 3009 { AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4,
|
H A D | AArch64ISelLowering.cpp | 3600 AArch64::X3, AArch64::X4, AArch64::X5,
|
/freebsd-12-stable/sys/dev/mlx5/mlx5_core/ |
H A D | fs_core.h | 49 FS_FT_FDB = 0X4,
|
/freebsd-12-stable/sys/crypto/aesni/ |
H A D | aesni_ghash.c | 164 __m128i X1, __m128i X2, __m128i X3, __m128i X4, __m128i *res) 176 H4_X4_lo = _mm_clmulepi64_si128(H4, X4, 0x00); 185 H4_X4_hi = _mm_clmulepi64_si128(H4, X4, 0x11); 204 tmp7 = _mm_shuffle_epi32(X4, 78); 206 tmp7 = _mm_xor_si128(tmp7, X4); 163 reduce4(__m128i H1, __m128i H2, __m128i H3, __m128i H4, __m128i X1, __m128i X2, __m128i X3, __m128i X4, __m128i *res) argument
|
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/ |
H A D | AArch64BaseInfo.h | 35 case AArch64::X4: return AArch64::W4; 75 case AArch64::W4: return AArch64::X4;
|
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
H A D | RISCVMCCodeEmitter.cpp | 145 assert(TPReg.isReg() && TPReg.getReg() == RISCV::X4 &&
|
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64MCTargetDesc.cpp | 101 {codeview::RegisterId::ARM64_X4, AArch64::X4},
|
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86InstComments.cpp | 951 CASE_VSHUF(32X4, r) 956 CASE_VSHUF(32X4, m)
|
/freebsd-12-stable/contrib/gcc/config/ia64/ |
H A D | unwind-ia64.c | 1147 UNW_DEC_RESTORE_P(X4, qp, t, abreg, arg); 1149 UNW_DEC_SPILL_REG_P(X4, qp, t, abreg, x, ytreg, arg);
|
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/RISCV/AsmParser/ |
H A D | RISCVAsmParser.cpp | 1783 if (Inst.getOperand(2).getReg() != RISCV::X4) {
|
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineCompares.cpp | 1925 Value *X1, *X2, *X3, *X4; local 1927 match(OrOp1, m_OneUse(m_Xor(m_Value(X3), m_Value(X4))))) { 1928 // ((X1 ^ X2) || (X3 ^ X4)) == 0 --> (X1 == X2) && (X3 == X4) 1929 // ((X1 ^ X2) || (X3 ^ X4)) != 0 --> (X1 != X2) || (X3 != X4) 1931 Value *Cmp34 = Builder.CreateICmp(Pred, X3, X4);
|
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/ |
H A D | AArch64Disassembler.cpp | 418 AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4,
|
/freebsd-12-stable/sys/ofed/include/rdma/ |
H A D | ib_verbs.h | 1667 IB_IPV4_MORE_FRAG = 0X4 /* For All fragmented packets except the
|
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 3782 PPC::X3, PPC::X4, PPC::X5, PPC::X6, 4197 PPC::X3, PPC::X4, PPC::X5, PPC::X6, 4620 PPC::X3, PPC::X4, PPC::X5, PPC::X6, 5880 PPC::X3, PPC::X4, PPC::X5, PPC::X6, 6612 PPC::X3, PPC::X4, PPC::X5, PPC::X6, 6904 PPC::X3, PPC::X4, PPC::X5, PPC::X6, 15347 return Subtarget.isPPC64() ? PPC::X4 : PPC::R4;
|