Searched refs:VReg1 (Results 1 - 2 of 2) sorted by relevance
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMInstructionSelector.cpp | 247 Register VReg1 = MIB->getOperand(1).getReg(); local 248 (void)VReg1; 249 assert(MRI.getType(VReg1).getSizeInBits() == 32 && 250 RBI.getRegBank(VReg1, MRI, TRI)->getID() == ARM::GPRRegBankID && 279 Register VReg1 = MIB->getOperand(1).getReg(); local 280 (void)VReg1; 281 assert(MRI.getType(VReg1).getSizeInBits() == 32 && 282 RBI.getRegBank(VReg1, MRI, TRI)->getID() == ARM::GPRRegBankID &&
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H A D | ARMISelLowering.cpp | 9730 Register VReg1 = MRI->createVirtualRegister(TRC); local 9731 BuildMI(DispatchBB, dl, TII->get(ARM::t2MOVi16), VReg1) 9735 unsigned VReg2 = VReg1; 9739 .addReg(VReg1) 9796 Register VReg1 = MRI->createVirtualRegister(TRC); local 9798 .addReg(VReg1, RegState::Define) 9803 .addReg(VReg1) 9868 Register VReg1 = MRI->createVirtualRegister(TRC); local 9869 BuildMI(DispatchBB, dl, TII->get(ARM::MOVi16), VReg1) 9873 unsigned VReg2 = VReg1; 9897 Register VReg1 = MRI->createVirtualRegister(TRC); local [all...] |
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