Searched refs:UseReg (Results 1 - 6 of 6) sorted by relevance
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonCopyToCombine.cpp | 246 /// Returns true if it is unsafe to move a copy instruction from \p UseReg to 248 static bool isUnsafeToMoveAcross(MachineInstr &MI, unsigned UseReg, argument 251 return (UseReg && (MI.modifiesRegister(UseReg, TRI))) || 257 static Register UseReg(const MachineOperand& MO) { function 268 Register I2UseReg = UseReg(I2.getOperand(1)); 335 Register I1UseReg = UseReg(I1.getOperand(1));
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIFoldOperands.cpp | 467 // Find a def of the UseReg, check if it is a reg_seqence and find initializers 472 Register UseReg, uint8_t OpTy, 474 MachineInstr *Def = MRI.getUniqueVRegDef(UseReg); 527 Register UseReg = OpToFold.getReg(); 528 if (!Register::isVirtualRegister(UseReg)) 537 if (!getRegSeqInit(Defs, UseReg, OpTy, TII, MRI)) 697 Register UseReg = OpToFold.getReg(); local 698 UseMI->getOperand(1).setReg(UseReg); 710 getRegSeqInit(Defs, UseReg, AMDGPU::OPERAND_REG_INLINE_C_INT32, TII, 868 Register UseReg local 470 getRegSeqInit( SmallVectorImpl<std::pair<MachineOperand*, unsigned>> &Defs, Register UseReg, uint8_t OpTy, const SIInstrInfo *TII, const MachineRegisterInfo &MRI) argument [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCVSXSwapRemoval.cpp | 698 Register UseReg = MI->getOperand(0).getReg(); local 699 MachineInstr *DefMI = MRI->getVRegDef(UseReg); 775 Register UseReg = MI->getOperand(0).getReg(); local 776 MachineInstr *DefMI = MRI->getVRegDef(UseReg);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
H A D | HexagonMCCodeEmitter.cpp | 737 unsigned UseReg = MO.getReg(); 759 if (!RegisterMatches(UseReg, DefReg1, DefReg2)) { 778 Offset |= HexagonMCInstrInfo::SubregisterBit(UseReg, DefReg1, DefReg2);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMFastISel.cpp | 211 unsigned ARMSelectCallOp(bool UseReg); 2177 unsigned ARMFastISel::ARMSelectCallOp(bool UseReg) { argument 2178 if (UseReg) 2390 bool UseReg = false; 2392 if (!GV || Subtarget->genLongCalls()) UseReg = true; 2395 if (UseReg) { 2405 unsigned CallOpc = ARMSelectCallOp(UseReg); 2412 if (UseReg)
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 2776 unsigned UseReg = lookUpRegForValue(SI); local 2777 if (UseReg) 2778 MRI.clearKillFlags(UseReg); 4622 unsigned UseReg = lookUpRegForValue(I); local 4623 if (UseReg) 4624 MRI.clearKillFlags(UseReg);
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