Searched refs:SrcHi (Results 1 - 5 of 5) sorted by relevance
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AVR/ |
H A D | AVRInstrInfo.cpp | 55 unsigned DestLo, DestHi, SrcLo, SrcHi; local 58 TRI.splitReg(SrcReg, SrcLo, SrcHi); 64 .addReg(SrcHi, getKillRegState(KillSrc));
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsSEInstrInfo.cpp | 725 const MachineOperand &SrcLo = I->getOperand(1), &SrcHi = I->getOperand(2); local 740 HiInst.addReg(SrcHi.getReg(), getKillRegState(SrcHi.isKill()));
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonFrameLowering.cpp | 1784 Register SrcHi = HRI.getSubReg(SrcR, Hexagon::vsub_hi); local 1810 if (LPR.contains(SrcHi)) { 1816 .addReg(SrcHi, getKillRegState(IsKill))
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H A D | HexagonInstrInfo.cpp | 1303 Register SrcHi = HRI.getSubReg(Op2.getReg(), Hexagon::vsub_hi); local 1307 .addReg(SrcHi) 1315 Register SrcHi = HRI.getSubReg(Op3.getReg(), Hexagon::vsub_hi); local 1319 .addReg(SrcHi)
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIISelLowering.cpp | 6097 SDValue SrcHi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, SrcVec, local 6099 return DAG.getSetCC(SL, MVT::i1, SrcHi, Aperture, ISD::SETEQ);
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