Searched refs:Spills (Results 1 - 5 of 5) sorted by relevance

/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Coroutines/
H A DCoroFrame.cpp303 // assigned. This works out fine as the users of Spills capture the info about
322 static void dump(StringRef Title, SpillInfo const &Spills) { argument
325 for (auto const &E : Spills) {
396 SpillInfo &Spills) {
432 for (auto &S : Spills) {
586 static Instruction *insertSpills(const SpillInfo &Spills, coro::Shape &Shape) { argument
653 for (auto const &E : Spills) {
956 SpillInfo const &Spills) {
961 for (auto const &E : Spills) {
1358 SpillInfo Spills; local
395 buildFrameType(Function &F, coro::Shape &Shape, SpillInfo &Spills) argument
955 rewriteMaterializableInstructions(IRBuilder< &IRB, SpillInfo const &Spills) argument
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DLiveInterval.cpp1115 // - When LastStart is invalid, Spills is empty and the iterators are invalid.
1123 // 3. Spills.
1128 // - Segments in Spills precede and can't coalesce with segments in area 2.
1129 // - No coalescing is possible between segments in Spills and segments in area
1132 // The segments in Spills are not ordered with respect to the segments in area
1135 // When they exist, Spills.back().start <= LastStart,
1153 OS << "\n Spills:";
1154 for (unsigned I = 0, E = Spills.size(); I != E; ++I)
1155 OS << ' ' << Spills[I];
1194 assert(Spills
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H A DInlineSpiller.cpp122 SmallPtrSet<MachineInstr *, 16> &Spills,
127 MachineBasicBlock *Root, SmallPtrSet<MachineInstr *, 16> &Spills,
134 SmallPtrSet<MachineInstr *, 16> &Spills,
1196 SmallPtrSet<MachineInstr *, 16> &Spills,
1202 for (const auto CurrentSpill : Spills) {
1218 Spills.erase(SpillToRm);
1222 /// tree to visit all basic blocks containing the elements of \p Spills.
1226 /// \post SpillsToRm.union(Spills\@post) == Spills\@pre
1228 MachineBasicBlock *Root, SmallPtrSet<MachineInstr *, 16> &Spills,
1195 rmRedundantSpills( SmallPtrSet<MachineInstr *, 16> &Spills, SmallVectorImpl<MachineInstr *> &SpillsToRm, DenseMap<MachineDomTreeNode *, MachineInstr *> &SpillBBToSpill) argument
1227 getVisitOrders( MachineBasicBlock *Root, SmallPtrSet<MachineInstr *, 16> &Spills, SmallVectorImpl<MachineDomTreeNode *> &Orders, SmallVectorImpl<MachineInstr *> &SpillsToRm, DenseMap<MachineDomTreeNode *, unsigned> &SpillsToKeep, DenseMap<MachineDomTreeNode *, MachineInstr *> &SpillBBToSpill) argument
1314 runHoistSpills( LiveInterval &OrigLI, VNInfo &OrigVNI, SmallPtrSet<MachineInstr *, 16> &Spills, SmallVectorImpl<MachineInstr *> &SpillsToRm, DenseMap<MachineBasicBlock *, unsigned> &SpillsToIns) argument
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H A DRegAllocGreedy.cpp545 unsigned &FoldedReloads, unsigned &Spills,
551 unsigned Reloads, FoldedReloads, Spills, FoldedSpills; local
552 reportNumberOfSplillsReloads(L, Reloads, FoldedReloads, Spills,
3145 unsigned &Spills,
3149 Spills = 0;
3163 Spills += SubSpills;
3189 ++Spills;
3195 if (Reloads || FoldedReloads || Spills || FoldedSpills) {
3201 if (Spills)
3202 R << NV("NumSpills", Spills) << " spill
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/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DLiveInterval.h932 SmallVector<LiveRange::Segment, 16> Spills;

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