Searched refs:SignBit (Results 1 - 11 of 11) sorted by relevance

/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/DebugInfo/DWARF/
H A DDWARFExpression.h45 SignBit = 0x80,
46 SignedSize1 = SignBit | Size1,
47 SignedSize2 = SignBit | Size2,
48 SignedSize4 = SignBit | Size4,
49 SignedSize8 = SignBit | Size8,
50 SignedSizeLEB = SignBit | SizeLEB,
/freebsd-12-stable/contrib/llvm-project/clang/lib/AST/Interp/
H A DIntegral.h144 const T SignBit = T(1) << (TruncBits - 1); local
146 return Integral((V & BitMask) | (Signed && (V & SignBit) ? ExtMask : 0));
/freebsd-12-stable/contrib/llvm-project/llvm/lib/DebugInfo/DWARF/
H A DDWARFExpression.cpp135 unsigned Signed = Size & Operation::SignBit;
140 switch (Size & ~Operation::SignBit) {
259 unsigned Signed = Size & Operation::SignBit;
/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeFloatTypes.cpp302 SDValue SignBit = DAG.getNode( local
306 SignBit = DAG.getNode(ISD::AND, dl, RVT, RHS, SignBit);
311 SignBit =
312 DAG.getNode(ISD::SRL, dl, RVT, SignBit,
314 TLI.getShiftAmountTy(SignBit.getValueType(),
316 SignBit = DAG.getNode(ISD::TRUNCATE, dl, LVT, SignBit);
318 SignBit = DAG.getNode(ISD::ANY_EXTEND, dl, LVT, SignBit);
[all...]
H A DLegalizeDAG.cpp71 uint8_t SignBit; member in struct:__anon4645::FloatSignAsInt
1454 State.SignBit = NumBits - 1;
1489 State.SignBit = 7;
1518 SDValue SignBit = DAG.getNode(ISD::AND, DL, IntVT, SignAsInt.IntValue,
1527 SDValue Cond = DAG.getSetCC(DL, getSetCCResultType(IntVT), SignBit,
1541 int ShiftAmount = SignAsInt.SignBit - MagAsInt.SignBit;
1543 if (SignBit.getValueSizeInBits() < ClearedSign.getValueSizeInBits()) {
1544 SignBit = DAG.getNode(ISD::ZERO_EXTEND, DL, MagVT, SignBit);
[all...]
H A DDAGCombiner.cpp11239 SDValue SignBit = DAG.getConstant( local
11243 FlipBit = SignBit;
11252 FlipBit = DAG.getNode(ISD::AND, SDLoc(N0), MVT::i64, Hi, SignBit);
11260 APInt SignBit = APInt::getSignMask(VT.getSizeInBits()); local
11263 NewConv, DAG.getConstant(SignBit, DL, VT));
11266 NewConv, DAG.getConstant(~SignBit, DL, VT));
11308 APInt SignBit = APInt::getSignMask(VT.getSizeInBits() / 2); local
11322 DAG.getConstant(SignBit, SDLoc(XorResult64), MVT::i64));
11329 APInt SignBit = APInt::getSignMask(VT.getSizeInBits()); local
11331 X, DAG.getConstant(SignBit, SDLo
[all...]
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp1007 APInt SignBit = APInt::getSignMask(32); local
1010 DAG.getConstant(SignBit, DL, MVT::i32));
1015 DAG.getConstant(~SignBit, DL, MVT::i32));
1052 APInt SignBit = APInt::getSignMask(32).sext(64); local
1056 DAG.getConstant(SignBit, DL, MVT::i64)));
1061 DAG.getConstant(~SignBit, DL, MVT::i64)));
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp2100 SDValue SignBit = DAG.getNode(ISD::AND, SL, MVT::i32, Hi, SignBitMask); local
2103 SDValue SignBit64 = DAG.getBuildVector(MVT::v2i32, SL, {Zero, SignBit});
2423 const SDValue SignBit = DAG.getConstant(63, SL, MVT::i64); local
2424 S = DAG.getNode(ISD::SRA, SL, MVT::i64, L, SignBit);
H A DAMDGPULegalizerInfo.cpp1452 auto SignBit = B.buildAnd(S32, Hi, SignBitMask);
1459 auto SignBit64 = B.buildMerge(S64, {Zero32.getReg(0), SignBit.getReg(0)});
/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp3952 auto SignBit = MIRBuilder.buildConstant(S64, 63); local
3953 auto S = MIRBuilder.buildAShr(S64, L, SignBit);
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp20522 SDValue SignBit = DAG.getNode(X86ISD::FAND, dl, LogicVT, Sign, SignMask);
20540 SDValue Or = DAG.getNode(X86ISD::FOR, dl, LogicVT, MagBits, SignBit);
[all...]

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