Searched refs:ShiftBits (Results 1 - 6 of 6) sorted by relevance
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCRegisterInfo.cpp | 671 // rlwinm rA, rA, ShiftBits, 0, 31. 716 unsigned ShiftBits = getEncodingValue(DestReg)*4; local 717 // rlwinm r11, r11, 32-ShiftBits, 0, 31. 719 .addReg(Reg1, RegState::Kill).addImm(32-ShiftBits).addImm(0) 820 // rlwinm rA, rA, ShiftBits, 0, 0. 868 unsigned ShiftBits = getEncodingValue(DestReg); local 869 // rlwimi r11, r10, 32-ShiftBits, ..., ... 873 .addImm(ShiftBits ? 32 - ShiftBits : 0) 874 .addImm(ShiftBits) [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Analysis/ |
H A D | BasicAliasAnalysis.cpp | 438 unsigned ShiftBits = Offset.getBitWidth() - PointerSize; local 439 return (Offset << ShiftBits).ashr(ShiftBits);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 3723 unsigned ShiftBits = AndRHSC.countTrailingZeros(); local 3724 if (!TLI.shouldAvoidTransformToShift(ShValTy, ShiftBits)) { 3727 DAG.getConstant(ShiftBits, dl, ShiftTy)); 3728 SDValue CmpRHS = DAG.getConstant(C1.lshr(ShiftBits), dl, ShValTy); 3740 unsigned ShiftBits; local 3744 ShiftBits = C1.countTrailingOnes(); 3748 ShiftBits = C1.countTrailingZeros(); 3750 NewC.lshrInPlace(ShiftBits); 3751 if (ShiftBits && NewC.getMinSignedBits() <= 64 && 3753 !TLI.shouldAvoidTransformToShift(ShValTy, ShiftBits)) { [all...] |
H A D | DAGCombiner.cpp | 4731 unsigned ShiftBits = CShift->getZExtValue(); local 4734 if (ShiftBits == 0) 4743 (ShiftBits + MaskBits <= Size / 2) && 4763 SDValue ShiftK = DAG.getConstant(ShiftBits, SL, ShiftVT);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 4291 unsigned ShiftBits = countLeadingZeros(Mask); local 4292 if (RHSV && (RHSV > 255 || (RHSV << ShiftBits) <= 255)) { 4293 SDValue ShiftAmt = DAG.getConstant(ShiftBits, dl, MVT::i32); 4295 RHS = DAG.getConstant(RHSV << ShiftBits, dl, MVT::i32);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 5861 SDValue ShiftBits = DAG.getTargetConstant(SubVecNumElems, dl, MVT::i8); 5864 Vec = DAG.getNode(X86ISD::KSHIFTR, dl, WideOpVT, Vec, ShiftBits); 5865 Vec = DAG.getNode(X86ISD::KSHIFTL, dl, WideOpVT, Vec, ShiftBits); 5913 SDValue ShiftBits = DAG.getTargetConstant(NumElems - IdxVal, dl, MVT::i8); 5914 Vec = DAG.getNode(X86ISD::KSHIFTL, dl, WideOpVT, Vec, ShiftBits); 5915 Vec = DAG.getNode(X86ISD::KSHIFTR, dl, WideOpVT, Vec, ShiftBits); [all...] |
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