Searched refs:SLL (Results 1 - 16 of 16) sorted by relevance

/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsAnalyzeImmediate.cpp48 AddInstr(SeqLs, Inst(SLL, Shamt));
83 // Replace a ADDiu & SLL pair with a LUi.
86 // SLL 18
90 // Check if the first two instructions are ADDiu and SLL and the shift amount
93 (Seq[1].Opc != SLL) || (Seq[1].ImmOpnd < 16))
136 SLL = Mips::SLL;
141 SLL = Mips::DSLL;
H A DMipsAnalyzeImmediate.h45 /// GetInstSeqLsSLL - Get instruction sequences which end with a SLL to
52 /// ReplaceADDiuSLLWithLUi - Replace an ADDiu & SLL pair with a LUi.
60 unsigned ADDiu, ORi, SLL, LUi; member in class:llvm::MipsAnalyzeImmediate
H A DMipsInstructionSelector.cpp339 MachineInstr *SLL = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::SLL)) local
343 if (!constrainSelectedInstRegOperands(*SLL, TII, TRI, RBI))
H A DMipsFastISel.cpp1618 emitInst(Mips::SLL, TempReg[0]).addReg(SrcReg).addImm(8);
1646 emitInst(Mips::SLL, TempReg[5]).addReg(TempReg[4]).addImm(8);
1648 emitInst(Mips::SLL, TempReg[6]).addReg(SrcReg).addImm(24);
1846 emitInst(Mips::SLL, TempReg).addReg(SrcReg).addImm(ShiftAmt);
1999 Opcode = Mips::SLL;
H A DMipsExpandPseudo.cpp183 BuildMI(sinkMBB, DL, TII->get(Mips::SLL), Dest)
558 BuildMI(sinkMBB, DL, TII->get(Mips::SLL), Dest)
H A DMipsAsmPrinter.cpp1221 EmitToStreamer(*OutStreamer, MCInstBuilder(Mips::SLL)
H A DMipsISelLowering.cpp1640 BuildMI(BB, DL, TII->get(Mips::SLL), ScrReg).addReg(SrcReg).addImm(ShiftImm);
1788 BuildMI(BB, DL, TII->get(Mips::SLL), ShiftAmt).addReg(PtrLSB2).addImm(3);
1793 BuildMI(BB, DL, TII->get(Mips::SLL), ShiftAmt).addReg(Off).addImm(3);
1975 BuildMI(BB, DL, TII->get(Mips::SLL), ShiftAmt).addReg(PtrLSB2).addImm(3);
1980 BuildMI(BB, DL, TII->get(Mips::SLL), ShiftAmt).addReg(Off).addImm(3);
2727 SDValue SLL = DAG.getNode(ISD::SHL, DL, MVT::i64, LWR, Const32); local
2728 SDValue SRL = DAG.getNode(ISD::SRL, DL, MVT::i64, SLL, Const32);
H A DMipsSEISelLowering.cpp3311 // (SLL $lanetmp1, $lane, <log2size)
3321 // (SLL $lanetmp1, $lane, <log2size)
3342 unsigned ShiftOp = Subtarget.isABI_N64() ? Mips::DSLL : Mips::SLL;
/freebsd-12-stable/crypto/openssl/crypto/sha/asm/
H A Dsha512-mips.pl96 $SLL="dsll"; # shift left logical
111 $SLL="sll"; # shift left logical
212 $SLL $tmp1,$e,`$SZ*8-@Sigma1[2]`
216 $SLL $tmp1,$e,`$SZ*8-@Sigma1[1]`
220 $SLL $tmp1,$e,`$SZ*8-@Sigma1[0]`
228 $SLL $tmp1,$a,`$SZ*8-@Sigma0[2]`
232 $SLL $tmp1,$a,`$SZ*8-@Sigma0[1]`
236 $SLL $tmp1,$a,`$SZ*8-@Sigma0[0]`
276 $SLL $tmp1,@X[1],`$SZ*8-@sigma0[2]`
279 $SLL
[all...]
H A Dsha512-sparcv9.pl67 $SLL="sllx"; # shift left logical
93 $SLL="sll"; # shift left logical
234 $SLL $e,`$SZ*8-@Sigma1[2]`,$tmp1
238 $SLL $e,`$SZ*8-@Sigma1[1]`,$tmp1
242 $SLL $e,`$SZ*8-@Sigma1[0]`,$tmp1
250 $SLL $a,`$SZ*8-@Sigma0[2]`,$tmp1
254 $SLL $a,`$SZ*8-@Sigma0[1]`,$tmp1
258 $SLL $a,`$SZ*8-@Sigma0[0]`,$tmp1
/freebsd-12-stable/crypto/openssl/crypto/bn/asm/
H A Dmips.pl70 $SLL="dsll";
85 $SLL="sll";
919 $SLL $a2,1
926 $SLL $t2,$t1
934 $SLL $a0,$t9
935 $SLL $a1,$t9
959 $SLL $t3,$a0,4*$BNSZ # bits
980 $SLL $a1,4*$BNSZ # bits
982 $SLL $v0,$QT,4*$BNSZ # bits
992 $SLL
[all...]
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZShortenInst.cpp324 if (TwoOperandOpcode == SystemZ::SLL ||
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsTargetStreamer.cpp280 emitRRI(Mips::SLL, Mips::ZERO, Mips::ZERO, 0, IDLoc, STI);
287 emitRRI(Mips::SLL, Mips::ZERO, Mips::ZERO, 0, IDLoc, STI);
H A DMipsMCCodeEmitter.cpp186 // Unfortunately in MIPS both NOP and SLL will come in with Binary == 0
189 if ((Opcode != Mips::NOP) && (Opcode != Mips::SLL) &&
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVExpandPseudoInsts.cpp399 BuildMI(MBB, DL, TII->get(RISCV::SLL), ValReg)
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp3624 TOut.emitRRI(Mips::SLL, Mips::ZERO, Mips::ZERO, 0, IDLoc, STI);
3642 TOut.emitRRI(Mips::SLL, Mips::ZERO, Mips::ZERO, 0, IDLoc, STI);
4390 TOut.emitRRI(Mips::SLL, SllReg, SllReg, 8, IDLoc, STI);
4436 TOut.emitRRI(Mips::SLL, DstReg, DstReg, 8, IDLoc, STI);
4848 FirstShift = Mips::SLL;
4853 SecondShift = Mips::SLL;

Completed in 173 milliseconds