Searched refs:RADEON_WRITE (Results 1 - 2 of 2) sorted by relevance

/freebsd-12-stable/sys/dev/drm2/radeon/
H A Dradeon_irq.c50 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
63 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
151 RADEON_WRITE(R500_D1MODE_VBLANK_STATUS, R500_VBLANK_ACK);
153 RADEON_WRITE(R500_D2MODE_VBLANK_STATUS, R500_VBLANK_ACK);
162 RADEON_WRITE(RADEON_GEN_INT_STATUS, irqs);
264 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
265 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
300 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
302 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
H A Dradeon_drv.h1851 #define RADEON_WRITE(reg, val) \ macro
1867 RADEON_WRITE(RADEON_CLOCK_CNTL_DATA, (val)); \
1874 RADEON_WRITE(RADEON_PCIE_DATA, (val)); \
1879 RADEON_WRITE(R520_MC_IND_INDEX, 0xff0000 | ((addr) & 0xff)); \
1880 RADEON_WRITE(R520_MC_IND_DATA, (val)); \
1881 RADEON_WRITE(R520_MC_IND_INDEX, 0); \
1886 RADEON_WRITE(RS480_NB_MC_INDEX, \
1888 RADEON_WRITE(RS480_NB_MC_DATA, (val)); \
1889 RADEON_WRITE(RS480_NB_MC_INDEX, 0xff); \
1894 RADEON_WRITE(RS690_MC_INDE
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