Searched refs:R92C_FPGA0_RFIFACESW (Results 1 - 6 of 6) sorted by relevance

/freebsd-12-stable/sys/dev/rtwn/rtl8188e/
H A Dr88e_calib.c199 rtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(0));
201 rtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(1));
213 rtwn_bb_write(sc, R92C_FPGA0_RFIFACESW(1), 0x22204000);
214 rtwn_bb_setbits(sc, R92C_FPGA0_RFIFACESW(0), 0, 0x04000400);
262 rtwn_bb_write(sc, R92C_FPGA0_RFIFACESW(0), vals->fpga0_rfifacesw0);
263 rtwn_bb_write(sc, R92C_FPGA0_RFIFACESW(1), vals->fpga0_rfifacesw1);
/freebsd-12-stable/sys/dev/rtwn/rtl8192c/
H A Dr92c_calib.c182 rtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(0));
184 rtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(1));
196 rtwn_bb_write(sc, R92C_FPGA0_RFIFACESW(1), 0x22204000);
197 rtwn_bb_setbits(sc, R92C_FPGA0_RFIFACESW(0), 0, 0x04000400);
270 rtwn_bb_write(sc, R92C_FPGA0_RFIFACESW(0), vals->fpga0_rfifacesw0);
271 rtwn_bb_write(sc, R92C_FPGA0_RFIFACESW(1), vals->fpga0_rfifacesw1);
H A Dr92c_init.c245 reg = rtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx));
268 rtwn_bb_setbits(sc, R92C_FPGA0_RFIFACESW(idx),
H A Dr92c_reg.h685 #define R92C_FPGA0_RFIFACESW(idx) (0x870 + (idx) * 4) macro
/freebsd-12-stable/sys/dev/rtwn/rtl8192c/pci/
H A Dr92ce_calib.c181 rtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(1));
186 rtwn_bb_write(sc, R92C_FPGA0_RFIFACESW(1), 0x22204000);
258 rtwn_bb_write(sc, R92C_FPGA0_RFIFACESW(1),
/freebsd-12-stable/sys/dev/rtwn/rtl8192e/
H A Dr92e_init.c176 reg = rtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx));

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