Searched refs:PLL (Results 1 - 3 of 3) sorted by relevance
| /freebsd-12-stable/sys/arm/nvidia/tegra124/ |
| H A D | tegra124_clk_pll.c | 119 #define PLL(_id, cname, pname) \ macro
221 PLL(TEGRA124_CLK_PLL_M, "pllM_out0", "osc_div_clk"),
232 PLL(TEGRA124_CLK_PLL_X, "pllX_out", "osc_div_clk"),
245 PLL(TEGRA124_CLK_PLL_C, "pllC_out0", "osc_div_clk"),
258 PLL(TEGRA124_CLK_PLL_C2, "pllC2_out0", "osc_div_clk"),
269 PLL(TEGRA124_CLK_PLL_C3, "pllC3_out0", "osc_div_clk"),
280 PLL(TEGRA124_CLK_PLL_C4, "pllC4_out0", "pllC4_src"),
293 PLL(TEGRA124_CLK_PLL_P, "pllP_out0", "osc_div_clk"),
303 PLL(TEGRA124_CLK_PLL_A, "pllA_out", "pllP_out1"),
313 PLL(TEGRA124_CLK_PLL_
[all...] |
| /freebsd-12-stable/sys/arm64/rockchip/clk/ |
| H A D | rk3399_cru.c | 694 /* Standard PLL. */
695 #define PLL(_id, _name, _base) \ macro
798 PLL(PLL_APLLL, "lpll", 0x00),
799 PLL(PLL_APLLB, "bpll", 0x20),
800 PLL(PLL_DPLL, "dpll", 0x40),
801 PLL(PLL_CPLL, "cpll", 0x60),
802 PLL(PLL_GPLL, "gpll", 0x80),
803 PLL(PLL_NPLL, "npll", 0xA0),
804 PLL(PLL_VPLL, "vpll", 0xC0),
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| /freebsd-12-stable/sys/mips/ingenic/ |
| H A D | jz4780_clock.c | 82 #define PLL(_id, cname, pname, reg) { \ macro
138 /* PLL definitions */
140 PLL(JZ4780_CLK_APLL, "apll", "ext", JZ_CPAPCR),
141 PLL(JZ4780_CLK_MPLL, "mpll", "ext", JZ_CPMPCR),
142 PLL(JZ4780_CLK_EPLL, "epll", "ext", JZ_CPEPCR),
143 PLL(JZ4780_CLK_VPLL, "vpll", "ext", JZ_CPVPCR),
717 /* Enable OTG, should not be necessary since we use PLL clock */
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