Searched refs:ORi (Results 1 - 7 of 7) sorted by relevance
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsAnalyzeImmediate.cpp | 41 AddInstr(SeqLs, Inst(ORi, Imm & 0xffffULL));
74 // instruction is an ADDiu or ORi. In that case, do not call GetInstSeqLsORi.
135 ORi = Mips::ORi;
140 ORi = Mips::ORi64;
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| H A D | MipsAnalyzeImmediate.h | 41 /// GetInstSeqLsORi - Get instrutcion sequences which end with an ORi to
60 unsigned ADDiu, ORi, SLL, LUi; member in class:llvm::MipsAnalyzeImmediate
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| H A D | MipsInstructionSelector.cpp | 144 B.buildInstr(Mips::ORi, {DestReg}, {Register(Mips::ZERO)})
165 MachineInstr *ORi = B.buildInstr(Mips::ORi, {DestReg}, {LUiReg}) local
169 if (!constrainSelectedInstRegOperands(*ORi, TII, TRI, RBI))
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| H A D | MipsSEISelDAGToDAG.cpp | 1075 Res = CurDAG->getMachineNode(Mips::ORi, DL, MVT::i32,
1098 Res = CurDAG->getMachineNode(Mips::ORi, DL, MVT::i32,
1160 // bits that's a negative number we can do better than LUi/ORi
1167 Res = CurDAG->getMachineNode(Mips::ORi, DL, MVT::i32,
1175 HiRes = CurDAG->getMachineNode(Mips::ORi, DL, MVT::i32,
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| H A D | MipsFastISel.cpp | 373 emitInst(Mips::ORi, ResultReg).addReg(Mips::ZERO).addImm(Imm);
382 emitInst(Mips::ORi, ResultReg).addReg(TmpReg).addImm(Lo);
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| H A D | MipsISelLowering.cpp | 1795 BuildMI(BB, DL, TII->get(Mips::ORi), MaskUpper)
1982 BuildMI(BB, DL, TII->get(Mips::ORi), MaskUpper)
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 2541 case Mips::ORi: case Mips::ORi_MM: case Mips::ORi64:
2735 TOut.emitRRI(Mips::ORi, TmpReg, ZeroReg, ImmValue, IDLoc, STI);
2757 // Expand to an ORi instead of a LUi to avoid sign-extending into the
2759 TOut.emitRRI(Mips::ORi, TmpReg, ZeroReg, Bits31To16, IDLoc, STI);
2762 TOut.emitRRI(Mips::ORi, TmpReg, TmpReg, Bits15To0, IDLoc, STI);
2770 TOut.emitRRI(Mips::ORi, TmpReg, TmpReg, Bits15To0, IDLoc, STI);
2788 TOut.emitRRI(Mips::ORi, TmpReg, ZeroReg, Bits, IDLoc, STI);
2816 TOut.emitRRI(Mips::ORi, TmpReg, TmpReg, ImmChunk, IDLoc, STI);
4325 TOut.emitRRI(Mips::ORi, ATReg, ThirdReg, 0x3, IDLoc, STI);
4684 case Mips::ORi
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