| /freebsd-12-stable/contrib/llvm-project/llvm/tools/llvm-mca/Views/ |
| H A D | DispatchStatistics.cpp | 42 double Percentage = ((double)Entry.second / NumCycles) * 100.0;
53 unsigned NumCycles) {
59 double Percentage = ((double)NumStalls / NumCycles) * 100.0;
69 printStalls(SS, HWStalls[HWStallEvent::RegisterFileStall], NumCycles);
71 printStalls(SS, HWStalls[HWStallEvent::RetireControlUnitStall], NumCycles);
73 printStalls(SS, HWStalls[HWStallEvent::SchedulerQueueFull], NumCycles);
75 printStalls(SS, HWStalls[HWStallEvent::LoadQueueFull], NumCycles);
77 printStalls(SS, HWStalls[HWStallEvent::StoreQueueFull], NumCycles);
79 printStalls(SS, HWStalls[HWStallEvent::DispatchGroupStall], NumCycles);
52 printStalls(raw_ostream &OS, unsigned NumStalls, unsigned NumCycles) argument
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| H A D | DispatchStatistics.h | 46 unsigned NumCycles; member in class:llvm::mca::DispatchStatistics
66 : NumDispatched(0), NumCycles(0),
73 void onCycleBegin() override { NumCycles++; }
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| H A D | RetireControlUnitStatistics.cpp | 21 : NumRetired(0), NumCycles(0), EntriesInUse(0), MaxUsedEntries(0),
50 ++NumCycles;
69 << format("%.1f", ((double)Entry.second / NumCycles) * 100.0)
73 unsigned AvgUsage = (double)SumOfUsedEntries / NumCycles;
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| H A D | SchedulerStatistics.h | 53 unsigned NumCycles; member in class:llvm::mca::final
77 void onCycleBegin() override { NumCycles++; }
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| H A D | RetireControlUnitStatistics.h | 43 unsigned NumCycles; member in class:llvm::mca::RetireControlUnitStatistics
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| H A D | SchedulerStatistics.cpp | 23 NumCycles(0), MostRecentLoadDispatched(~0U),
117 << format("%.1f", ((double)IPC / NumCycles) * 100) << "%)\n";
124 assert(NumCycles && "Unexpected number of cycles!");
146 double AvgUsage = (double)BU.CumulativeNumUsedSlots / NumCycles;
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | EarlyIfConversion.cpp | 993 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); local
994 if (NumCycles > 1)
995 Cycles += NumCycles - 1;
1007 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); local
1008 if (NumCycles > 1)
1009 TCycle += NumCycles - 1;
1013 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); local
1014 if (NumCycles > 1)
1015 FCycle += NumCycles - 1;
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| H A D | IfConversion.cpp | 1125 unsigned NumCycles = SchedModel.computeInstrLatency(&MI, false); local
1126 if (NumCycles > 1)
1127 BBI.ExtraCost += NumCycles-1;
2197 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); local
2198 if (NumCycles > 1)
2199 ToBBI.ExtraCost += NumCycles-1;
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| H A D | MachinePipeliner.cpp | 1043 unsigned NumCycles = getSUnit(MI)->Latency; local
1048 dbgs() << "Trying to reserve resource for " << NumCycles
1052 for (unsigned C = 0; C < NumCycles; ++C)
1062 << ", NumCycles:" << NumCycles << "\n"); local
1064 for (unsigned C = ReservedCycles; C < NumCycles; ++C) {
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600InstrInfo.h | 184 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
187 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
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| H A D | R600InstrInfo.cpp | 901 unsigned NumCycles,
920 unsigned NumCycles,
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.h | 233 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
241 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
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| H A D | SystemZInstrInfo.cpp | 684 unsigned NumCycles, unsigned ExtraPredCycles,
698 return NumCycles == 1;
712 isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, argument
715 return NumCycles == 1;
683 isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, unsigned ExtraPredCycles, BranchProbability Probability) const argument
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 265 unsigned NumCycles, unsigned ExtraPredCycles,
273 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
275 return NumCycles == 1;
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| H A D | ARMBaseInstrInfo.cpp | 1991 unsigned NumCycles, unsigned ExtraPredCycles,
1993 if (!NumCycles)
2011 return isProfitableToIfCvt(MBB, NumCycles, ExtraPredCycles,
1990 isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, unsigned ExtraPredCycles, BranchProbability Probability) const argument
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.h | 138 /// instructions with accumulated instruction latency of "NumCycles"
142 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
164 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
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| H A D | HexagonInstrInfo.cpp | 770 unsigned NumCycles, unsigned ExtraPredCycles,
769 isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, unsigned ExtraPredCycles, BranchProbability Probability) const argument
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 314 unsigned NumCycles, unsigned ExtraPredCycles,
325 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
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| /freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 764 /// instructions with accumulated instruction latency of "NumCycles"
768 virtual bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, argument
795 unsigned NumCycles,
794 isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, BranchProbability Probability) const argument
|