/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 376 SDValue visitADDLikeCommutative(SDValue N0, SDValue N1, SDNode *LocReference); 382 SDValue visitUADDOLike(SDValue N0, SDValue N1, SDNode *N); 387 SDValue visitADDCARRYLike(SDValue N0, SDValue N1, SDValue CarryIn, SDNode *N); 394 SDValue visitSDIVLike(SDValue N0, SDValue N1, SDNode *N); 396 SDValue visitUDIVLike(SDValue N0, SDValue N1, SDNode *N); 405 SDValue visitANDLike(SDValue N0, SDValue N1, SDNode *N); 407 SDValue visitORLike(SDValue N0, SDValue N1, SDNode *N); 493 const SDLoc &DL, SDValue N0, 495 SDValue reassociateOpsCommutative(unsigned Opc, const SDLoc &DL, SDValue N0, 497 SDValue reassociateOps(unsigned Opc, const SDLoc &DL, SDValue N0, 844 SDValue N0, N1, N2; local 896 reassociationCanBreakAddressingModePattern(unsigned Opc, const SDLoc &DL, SDValue N0, SDValue N1) argument 954 reassociateOpsCommutative(unsigned Opc, const SDLoc &DL, SDValue N0, SDValue N1) argument 985 reassociateOps(unsigned Opc, const SDLoc &DL, SDValue N0, SDValue N1, SDNodeFlags Flags) argument 1209 SDValue N0 = Op.getOperand(0); local 1274 SDValue N0 = Op.getOperand(0); local 1689 SDValue N0 = N->getOperand(0); local 2090 SDValue N0 = N->getOperand(0); local 2308 SDValue N0 = N->getOperand(0); local 2332 SDValue N0 = N->getOperand(0); local 2418 foldAddSubMasked1(bool IsAdd, SDValue N0, SDValue N1, SelectionDAG &DAG, const SDLoc &DL) argument 2433 visitADDLikeCommutative(SDValue N0, SDValue N1, SDNode *LocReference) argument 2513 SDValue N0 = N->getOperand(0); local 2603 SDValue N0 = N->getOperand(0); local 2649 visitUADDOLike(SDValue N0, SDValue N1, SDNode *N) argument 2674 SDValue N0 = N->getOperand(0); local 2693 SDValue N0 = N->getOperand(0); local 2908 visitADDCARRYLike(SDValue N0, SDValue N1, SDValue CarryIn, SDNode *N) argument 2959 SDValue N0 = N->getOperand(0); local 3282 SDValue N0 = N->getOperand(0); local 3319 SDValue N0 = N->getOperand(0); local 3347 SDValue N0 = N->getOperand(0); local 3386 SDValue N0 = N->getOperand(0); local 3398 SDValue N0 = N->getOperand(0); local 3415 SDValue N0 = N->getOperand(0); local 3437 SDValue N0 = N->getOperand(0); local 3697 SDValue N0 = N->getOperand(0); local 3743 SDValue N0 = N->getOperand(0); local 3805 visitSDIVLike(SDValue N0, SDValue N1, SDNode *N) argument 3887 SDValue N0 = N->getOperand(0); local 3943 visitUDIVLike(SDValue N0, SDValue N1, SDNode *N) argument 3989 SDValue N0 = N->getOperand(0); local 4070 SDValue N0 = N->getOperand(0); local 4117 SDValue N0 = N->getOperand(0); local 4296 SDValue N0 = N->getOperand(0); local 4324 SDValue N0 = N->getOperand(0); local 4368 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1); local 4530 foldLogicOfSetCCs(bool IsAnd, SDValue N0, SDValue N1, const SDLoc &DL) argument 4680 visitANDLike(SDValue N0, SDValue N1, SDNode *N) argument 5053 SDValue N0 = N->getOperand(0); local 5153 SDValue N0 = N->getOperand(0); local 5445 MatchBSwapHWordLow(SDNode *N, SDValue N0, SDValue N1, bool DemandHighBits) argument 5670 MatchBSwapHWord(SDNode *N, SDValue N0, SDValue N1) argument 5724 visitORLike(SDValue N0, SDValue N1, SDNode *N) argument 5776 visitORCommutative( SelectionDAG &DAG, SDValue N0, SDValue N1, SDNode *N) argument 5793 SDValue N0 = N->getOperand(0); local 6983 SDValue N0 = N->getOperand(0); local 7020 SDValue N0 = N->getOperand(0); local 7398 SDValue N0 = N->getOperand(0); local 7455 SDValue N0 = N->getOperand(0); local 7705 SDValue N0 = N->getOperand(0); local 7897 SDValue N0 = N->getOperand(0); local 8126 SDValue N0 = N->getOperand(0); local 8200 SDValue N0 = N->getOperand(0); local 8216 SDValue N0 = N->getOperand(0); local 8229 SDValue N0 = N->getOperand(0); local 8242 SDValue N0 = N->getOperand(0); local 8259 SDValue N0 = N->getOperand(0); local 8269 SDValue N0 = N->getOperand(0); local 8286 SDValue N0 = N->getOperand(0); local 8296 SDValue N0 = N->getOperand(0); local 8512 SDValue N0 = N->getOperand(0); local 8875 SDValue N0 = N->getOperand(0); local 8990 SDValue N0 = N->getOperand(0); local 9085 SDValue N0 = N->getOperand(0); local 9169 ExtendUsesToFormExtLoad(EVT VT, SDNode *N, SDValue N0, unsigned ExtOpc, SmallVectorImpl<SDNode *> &ExtendNodes, const TargetLowering &TLI) argument 9252 SDValue N0 = N->getOperand(0); local 9474 tryToFoldExtOfExtload(SelectionDAG &DAG, DAGCombiner &Combiner, const TargetLowering &TLI, EVT VT, bool LegalOperations, SDNode *N, SDValue N0, ISD::LoadExtType ExtLoadType) argument 9505 tryToFoldExtOfLoad(SelectionDAG &DAG, DAGCombiner &Combiner, const TargetLowering &TLI, EVT VT, bool LegalOperations, SDNode *N, SDValue N0, ISD::LoadExtType ExtLoadType, ISD::NodeType ExtOpc) argument 9545 tryToFoldExtOfMaskedLoad(SelectionDAG &DAG, const TargetLowering &TLI, EVT VT, SDNode *N, SDValue N0, ISD::LoadExtType ExtLoadType, ISD::NodeType ExtOpc) argument 9610 SDValue N0 = N->getOperand(0); local 9899 SDValue N0 = N->getOperand(0); local 10155 SDValue N0 = N->getOperand(0); local 10305 SDValue N0 = N->getOperand(0); local 10368 SDValue N0 = N->getOperand(0); local 10568 SDValue N0 = N->getOperand(0); local 10702 SDValue N0 = N->getOperand(0); local 10718 SDValue N0 = N->getOperand(0); local 10734 SDValue N0 = N->getOperand(0); local 11147 SDValue N0 = N->getOperand(0); local 11521 SDValue N0 = N->getOperand(0); local 11739 SDValue N0 = N->getOperand(0); local 12041 SDValue N0 = N->getOperand(0); local 12133 SDValue N0 = N->getOperand(0); local 12312 SDValue N0 = N->getOperand(0); local 12404 SDValue N0 = N->getOperand(0); local 12538 SDValue N0 = N->getOperand(0); local 12736 SDValue N0 = N->getOperand(0); local 12840 SDValue N0 = N->getOperand(0); local 12888 SDValue N0 = N->getOperand(0); local 13046 SDValue N0 = N->getOperand(0); local 13107 SDValue N0 = N->getOperand(0); local 13154 SDValue N0 = N->getOperand(0); local 13195 SDValue N0 = N->getOperand(0); local 13210 SDValue N0 = N->getOperand(0); local 13225 SDValue N0 = N->getOperand(0); local 13281 SDValue N0 = N->getOperand(0); local 13334 SDValue N0 = N->getOperand(0); local 13345 SDValue N0 = N->getOperand(0); local 13369 SDValue N0 = N->getOperand(0); local 13381 SDValue N0 = N->getOperand(0); local 13448 SDValue N0 = N->getOperand(0); local 13485 SDValue N0 = N->getOperand(0); local 18674 SDValue N0 = Shuf->getOperand(0), N1 = Shuf->getOperand(1); local 18801 SDValue N0 = SVN->getOperand(0); local 18891 SDValue N0 = SVN->getOperand(0); local 19155 SDValue N0 = N->getOperand(0); local 19575 SDValue N0 = N->getOperand(0); local 19718 SDValue N0 = N->getOperand(0); local 19728 SDValue N0 = N->getOperand(0); local 19743 SDValue N0 = N->getOperand(0); local 19864 SDValue N0 = N->getOperand(0); local 20009 SimplifySelect(const SDLoc &DL, SDValue N0, SDValue N1, SDValue N2) argument 20234 foldSelectCCToShiftAnd(const SDLoc &DL, SDValue N0, SDValue N1, SDValue N2, SDValue N3, ISD::CondCode CC) argument 20309 convertSelectOfFPConstantsToLoadOffset( const SDLoc &DL, SDValue N0, SDValue N1, SDValue N2, SDValue N3, ISD::CondCode CC) argument 20364 SimplifySelectCC(const SDLoc &DL, SDValue N0, SDValue N1, SDValue N2, SDValue N3, ISD::CondCode CC, bool NotExtCompare) argument 20513 SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, const SDLoc &DL, bool foldBooleans) argument [all...] |
H A D | TargetLowering.cpp | 2731 TargetLowering::buildLegalVectorShuffle(EVT VT, const SDLoc &DL, SDValue N0, argument 2736 std::swap(N0, N1); 2744 return DAG.getVectorShuffle(VT, DL, N0, N1, Mask); 2845 SDValue TargetLowering::foldSetCCWithAnd(EVT VT, SDValue N0, SDValue N1, argument 2851 if (N1.getOpcode() == ISD::AND && N0.getOpcode() != ISD::AND) 2852 std::swap(N0, N1); 2854 EVT OpVT = N0.getValueType(); 2855 if (N0.getOpcode() != ISD::AND || !OpVT.isInteger() || 2860 if (N0.getOperand(0) == N1) { 2861 X = N0 2914 optimizeSetCCOfSignedTruncationCheck( EVT SCCVT, SDValue N0, SDValue N1, ISD::CondCode Cond, DAGCombinerInfo &DCI, const SDLoc &DL) const argument 3003 optimizeSetCCByHoistingAndByConstFromLogicalShift( EVT SCCVT, SDValue N0, SDValue N1C, ISD::CondCode Cond, DAGCombinerInfo &DCI, const SDLoc &DL) const argument 3076 foldSetCCWithBinOp(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, const SDLoc &DL, DAGCombinerInfo &DCI) const argument 3118 SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, bool foldBooleans, DAGCombinerInfo &DCI, const SDLoc &dl) const argument 4759 SDValue N0 = N->getOperand(0); local 4877 SDValue N0 = N->getOperand(0); local [all...] |
H A D | InstrEmitter.cpp | 550 SDValue N0 = Node->getOperand(0); 584 const ConstantSDNode *SD = cast<ConstantSDNode>(N0); 587 AddOperand(MIB, N0, 0, nullptr, VRBaseMap, /*IsDebug=*/false,
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H A D | SelectionDAG.cpp | 2679 SDValue N0 = Op.getOperand(0); 2680 Known = computeKnownBits(N0, Depth + 1); 2681 if (N0.getValueSizeInBits() != BitWidth) 2687 SDValue N0 = Op.getOperand(0); 2688 EVT SubVT = N0.getValueType(); 2697 Known = computeKnownBits(N0, DemandedElts, Depth + 1); 2705 assert(N0.getValueType().isVector() && "Expected bitcast from vector"); 2718 Known2 = computeKnownBits(N0, SubDemandedElts.shl(i), 2739 Known2 = computeKnownBits(N0, SubDemandedElts, Depth + 1); 3421 SelectionDAG::OverflowKind SelectionDAG::computeOverflowKind(SDValue N0, [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelDAGToDAG.cpp | 141 SDValue N0 = N.getOperand(0); 143 if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(N0)) { 147 } else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(N0)) { 152 } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(N0)) { 155 } else if (JumpTableSDNode *J = dyn_cast<JumpTableSDNode>(N0)) { 159 AM.BlockAddr = cast<BlockAddressSDNode>(N0)->getBlockAddress(); 160 //AM.SymbolFlags = cast<BlockAddressSDNode>(N0)->getTargetFlags();
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 1190 SDValue N0 = N->getOperand(0); 1193 if (!N0.isMachineOpcode() || 1194 N0.getMachineOpcode() != TargetOpcode::EXTRACT_SUBREG || 1195 N0.getConstantOperandVal(1) != X86::sub_8bit) 1201 SDValue N00 = N0.getOperand(0); 1501 SDValue N0 = N.getOperand(0); local 1502 if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(N0)) { 1506 } else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(N0)) { 1511 } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(N0)) { 1514 } else if (auto *S = dyn_cast<MCSymbolSDNode>(N0)) { 3519 SDValue N0 = Node->getOperand(0); local 3638 SDValue N0 = Node->getOperand(0); local 3671 SDValue N0 = Node->getOperand(0); local 4547 SDValue N0 = Node->getOperand(0); local 4596 SDValue N0 = Node->getOperand(0); local 4693 SDValue N0 = Node->getOperand(0); local 4771 SDValue N0 = Node->getOperand(0); local 4862 SDValue N0 = Node->getOperand(0); local 5038 SDValue N0 = Node->getOperand(0); local [all...] |
H A D | X86ISelLowering.cpp | 6730 SDValue N0 = N->getOperand(0); 6733 if (N0.getOpcode() == ISD::EXTRACT_SUBVECTOR && 6734 N0.getOperand(0).getValueType() == VT && 6735 N0.getConstantOperandVal(1) == 0) 6736 Ops.push_back(N0.getOperand(0)); 6741 if (N0.getValueType() == VT || !Ops.empty()) { 7154 SDValue N0 = N.getOperand(0); 7158 if (!getTargetConstantBitsFromNode(IsAndN ? N0 : N1, 8, UndefElts, EltBits)) 7170 Ops.push_back(IsAndN ? N1 : N0); 7212 SDValue N0 [all...] |
/freebsd-12-stable/crypto/openssl/crypto/bn/asm/ |
H A D | armv4-mont.pl | 295 my ($N0,$N1,$N2,$N3)=map("d$_",(4..7)); 344 vld1.32 {$N0-$N3}, [$nptr]! 350 vmlal.u32 @ACC[0],$Ni,${N0}[0] 352 vmlal.u32 @ACC[1],$Ni,${N0}[1] 399 vmlal.u32 @ACC[0],$Ni,${N0}[0] 400 vmlal.u32 @ACC[1],$Ni,${N0}[1] 472 vld1.32 {$N0-$N3},[$nptr]! 492 vmlal.u32 @ACC[0],$Ni,${N0}[0] 494 vmlal.u32 @ACC[1],$Ni,${N0}[1] 529 vmlal.u32 @ACC[0],$Ni,${N0}[ [all...] |
H A D | ppc64-mont.pl | 172 $N0="f20"; $N1="f21"; $N2="f22"; $N3="f23"; 397 lfd $N0,`$FRAME+96`($sp) 405 fcfid $N0,$N0 422 stfd $N0,40($nap_d) ; save n[j] in double format 444 fmadd $T0a,$N0,$na,$T0a 445 fmadd $T0b,$N0,$nb,$T0b 447 fmadd $T1a,$N0,$nc,$T1a 448 fmadd $T1b,$N0,$nd,$T1b 536 lfd $N0,` [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelLowering.cpp | 2612 SDValue N0 = Op.getOperand(0); local 2615 if (N0.getValueType() == MVT::f32) 2616 return DAG.getNode(AMDGPUISD::FP_TO_FP16, DL, Op.getValueType(), N0); 2623 assert(N0.getSimpleValueType() == MVT::f64); 2631 SDValue U = DAG.getNode(ISD::BITCAST, DL, MVT::i64, N0); 2988 SDValue N0 = N->getOperand(0); local 2992 if (N0.getOpcode() == ISD::TRUNCATE) { 2997 SDValue Src = N0.getOperand(0); 3287 SDValue N0, SDValue N1, unsigned Size, bool Signed) { 3290 return DAG.getNode(MulOpc, SL, MVT::i32, N0, N 3286 getMul24(SelectionDAG &DAG, const SDLoc &SL, SDValue N0, SDValue N1, unsigned Size, bool Signed) argument 3321 SDValue N0 = N->getOperand(0); local 3363 SDValue N0 = N->getOperand(0); local 3387 SDValue N0 = N->getOperand(0); local 3666 SDValue N0 = N->getOperand(0); local 3868 SDValue N0 = N->getOperand(0); local [all...] |
H A D | AMDGPUISelDAGToDAG.cpp | 1189 SDValue N0 = Addr.getOperand(0); local 1192 if (isDSOffsetLegal(N0, C1->getSExtValue(), 16)) { 1194 Base = N0; 1264 SDValue N0 = Addr.getOperand(0); local 1270 if (isDSOffsetLegal(N0, DWordOffset1, 8)) { 1271 Base = N0; 1365 SDValue N0 = Addr; local 1369 N0 = Addr.getOperand(0); 1374 if (N0.getOpcode() == ISD::ADD) { 1377 SDValue N2 = N0 1530 SDValue N0 = Addr.getOperand(0); local 1661 SDValue N0 = Addr.getOperand(0); local 1830 SDValue N0 = Addr.getOperand(0); local 1894 SDValue N0 = Index.getOperand(0); local [all...] |
H A D | SIISelLowering.cpp | 7139 SDValue N0 = Offset; local 7142 if ((C1 = dyn_cast<ConstantSDNode>(N0))) 7143 N0 = SDValue(); 7144 else if (DAG.isBaseWithConstantOffset(N0)) { 7145 C1 = cast<ConstantSDNode>(N0.getOperand(1)); 7146 N0 = N0.getOperand(0); 7167 if (!N0) 7168 N0 = OverflowVal; 7170 SDValue Ops[] = { N0, OverflowVa 7200 SDValue N0 = CombinedOffset.getOperand(0); local 8077 SDValue N0 = N->getOperand(0); local 8727 SDValue N0 = N->getOperand(0); local 8934 SDValue N0 = N->getOperand(0); local 9434 getFusedOpcode(const SelectionDAG &DAG, const SDNode *N0, const SDNode *N1) const argument 9498 getMad64_32(SelectionDAG &DAG, const SDLoc &SL, EVT VT, SDValue N0, SDValue N1, SDValue N2, bool Signed) argument [all...] |
H A D | SIISelLowering.h | 172 const SDNode *N0, const SDNode *N1) const;
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 584 SDValue N0 = Op.getOperand(0); 588 if (N0.getOpcode() == ISD::ADD) { 589 AddOp = N0; 593 OtherOp = N0; 1635 SDValue N0 = N->getOperand(0); local 1638 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0); 1640 EVT VT = N0.getValueType(); 1644 return DAG.getNode(XCoreISD::LADD, dl, DAG.getVTList(VT, VT), N1, N0, N2); 1663 SDValue Result = DAG.getNode(ISD::ADD, dl, VT, N0, N2); 1671 SDValue N0 local 1708 SDValue N0 = N->getOperand(0); local [all...] |
/freebsd-12-stable/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/lua/ |
H A D | lundump.c | 185 #define N0 LUAC_HEADERSIZE macro 197 if (memcmp(h,s,N0)==0) return;
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 8550 SDNode *N0 = N->getOperand(0).getNode(); local 8552 return N0->hasOneUse() && N1->hasOneUse() && 8553 isSignExtended(N0, DAG) && isSignExtended(N1, DAG); 8561 SDNode *N0 = N->getOperand(0).getNode(); local 8563 return N0->hasOneUse() && N1->hasOneUse() && 8564 isZeroExtended(N0, DAG) && isZeroExtended(N1, DAG); 8575 SDNode *N0 = Op.getOperand(0).getNode(); local 8579 bool isN0SExt = isSignExtended(N0, DAG); 8584 bool isN0ZExt = isZeroExtended(N0, DAG); 8591 if (isN1SExt && isAddSubSExt(N0, DA 8675 LowerSDIV_v4i16(SDValue N0, SDValue N1, const SDLoc &dl, SelectionDAG &DAG) argument 8721 SDValue N0 = Op.getOperand(0); local 8758 SDValue N0 = Op.getOperand(0); local 11081 SDValue N0 = N->getOperand(0); local 11104 AddCombineToVPADD(SDNode *N, SDValue N0, SDValue N1, TargetLowering::DAGCombinerInfo &DCI, const ARMSubtarget *Subtarget) argument 11132 AddCombineVUZPToVPADDL(SDNode *N, SDValue N0, SDValue N1, TargetLowering::DAGCombinerInfo &DCI, const ARMSubtarget *Subtarget) argument 11185 AddCombineBUILD_VECTORToVPADDL(SDNode *N, SDValue N0, SDValue N1, TargetLowering::DAGCombinerInfo &DCI, const ARMSubtarget *Subtarget) argument 11706 PerformADDCombineWithOperands(SDNode *N, SDValue N0, SDValue N1, TargetLowering::DAGCombinerInfo &DCI, const ARMSubtarget *Subtarget) argument 11891 SDValue N0 = N->getOperand(0); local 11911 SDValue N0 = N->getOperand(0); local 11965 SDValue N0 = N->getOperand(0); local 12293 SDValue N0 = N->getOperand(0); local 12434 SDValue N0 = N->getOperand(0); local 12523 SDValue N0 = N->getOperand(0); local 13951 SDValue N0 = N->getOperand(0); local 14030 SDValue N0 = N->getOperand(0); local 14095 SDValue N0 = N->getOperand(0); local [all...] |
H A D | ARMISelDAGToDAG.cpp | 393 SDValue N0 = N->getOperand(0); local 397 if (isOpcWithIntImmediate(N0.getNode(), ISD::AND, And_imm)) 398 std::swap(N0, N1); 433 if (SelectImmShifterOperand(N0, CPTmp0, CPTmp1)) 436 if (SelectImmShifterOperand(N0, CPTmp0, CPTmp1) || 437 SelectRegShifterOperand(N0, CPTmp0, CPTmp1, CPTmp2)) 451 CurDAG->UpdateNodeOperands(N, N0, N1); 3355 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1); local 3359 if (N0.getOpcode() == ISD::OR && N0 [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 2834 SDNode *N0 = N->getOperand(0).getNode(); local 2836 return N0->hasOneUse() && N1->hasOneUse() && 2837 isSignExtended(N0, DAG) && isSignExtended(N1, DAG); 2845 SDNode *N0 = N->getOperand(0).getNode(); local 2847 return N0->hasOneUse() && N1->hasOneUse() && 2848 isZeroExtended(N0, DAG) && isZeroExtended(N1, DAG); 2879 SDNode *N0 = Op.getOperand(0).getNode(); local 2883 bool isN0SExt = isSignExtended(N0, DAG); 2888 bool isN0ZExt = isZeroExtended(N0, DAG); 2895 if (isN1SExt && isAddSubSExt(N0, DA 7965 SDValue N0 = N->getOperand(0); local 9655 SDValue N0 = N->getOperand(0); local 9706 SDValue N0 = N->getOperand(0); local 10350 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1); local 12187 SDValue N0 = N->getOperand(0); local 12218 SDValue N0 = N->getOperand(0); local [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiISelLowering.cpp | 1445 SDValue N0 = N->getOperand(0); local 1447 if (N0.getNode()->hasOneUse()) 1448 if (SDValue Result = combineSelectAndUse(N, N0, N1, DCI, AllOnes)) 1451 if (SDValue Result = combineSelectAndUse(N, N1, N0, DCI, AllOnes)) 1459 SDValue N0 = N->getOperand(0); local 1464 if (SDValue Result = combineSelectAndUse(N, N1, N0, DCI, /*AllOnes=*/false))
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 4340 /// operands N0 and N1. This is a helper for PerformADDCombine that is 4343 static SDValue PerformADDCombineWithOperands(SDNode *N, SDValue N0, SDValue N1, argument 4349 EVT VT=N0.getValueType(); 4355 if (N0.getOpcode() == ISD::MUL) { 4362 !N0.getNode()->hasOneUse()) 4367 N0.getOperand(0), N0.getOperand(1), N1); 4369 else if (N0.getOpcode() == ISD::FMUL) { 4386 for (SDNode::use_iterator UI = N0.getNode()->use_begin(), 4387 UE = N0 4453 SDValue N0 = N->getOperand(0); local [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 5590 SDValue N0 = N->getOperand(0); local 5592 if (N0.getOpcode() == SystemZISD::SELECT_CCMASK) { 5593 auto *TrueOp = dyn_cast<ConstantSDNode>(N0.getOperand(0)); 5594 auto *FalseOp = dyn_cast<ConstantSDNode>(N0.getOperand(1)); 5596 SDLoc DL(N0); 5599 N0.getOperand(2), N0.getOperand(3), N0.getOperand(4) }; 5601 // If N0 has multiple uses, change other uses as well. 5602 if (!N0 5619 SDValue N0 = N->getOperand(0); local 5640 SDValue N0 = N->getOperand(0); local [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelDAGToDAG.cpp | 995 SDValue N0 = I->getOperand(0), N1 = I->getOperand(1); local 997 bool SelN0 = IsSelect0(N0); 998 SDValue SOp = SelN0 ? N0 : N1; 999 SDValue VOp = SelN0 ? N1 : N0; 1387 SDValue N0 = N.getOperand(0); local 1389 unsigned GAOpc = N0.getOpcode(); 1395 SDValue Addr = N0.getOperand(0);
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/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | TargetLowering.h | 1867 /// select(N0&N1, X, Y) => select(N0, select(N1, X, Y), Y) and 1868 /// select(N0|N1, X, Y) => select(N0, select(N1, X, Y, Y)) if it is likely 1869 /// that it saves us from materializing N0 and N1 in an integer register. 3254 SDValue buildLegalVectorShuffle(EVT VT, const SDLoc &DL, SDValue N0, 3309 SDValue SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, 4267 SDValue foldSetCCWithAnd(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, 4269 SDValue foldSetCCWithBinOp(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, 4272 SDValue optimizeSetCCOfSignedTruncationCheck(EVT SCCVT, SDValue N0, [all...] |
/freebsd-12-stable/contrib/gdb/gdb/ |
H A D | ada-lang.c | 2524 /* Returns true (non-zero) iff demangled name N0 should appear before N1 */ 2530 mangled_ordered_before (char *N0, char *N1) 2534 else if (N0 == NULL) 2539 for (k0 = strlen (N0) - 1; k0 > 0 && isdigit (N0[k0]); k0 -= 1) 2543 if ((N0[k0] == '_' || N0[k0] == '$') && N0[k0 + 1] != '\000' 2548 while (N0[n0] == '_' && n0 > 0 && N0[n 2525 mangled_ordered_before(char *N0, char *N1) argument [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 1075 SDValue N0 = N->getOperand(0); local 1076 EVT Ty = N0.getValueType(); 1078 (N0.getOpcode() == ISD::ADD || N0.getOpcode() == ISD::OR)) { 1079 auto *C1 = dyn_cast<ConstantSDNode>(N0->getOperand(1));
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