Searched refs:MovOpc (Results 1 - 7 of 7) sorted by relevance
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsAsmPrinter.cpp | 906 unsigned MovOpc, unsigned Reg1, 914 EmitInstrRegReg(STI, MovOpc, Reg1, FPReg1); 915 EmitInstrRegReg(STI, MovOpc, Reg2, FPReg2); 923 unsigned MovOpc = ToFP ? Mips::MTC1 : Mips::MFC1; local 926 EmitInstrRegReg(STI, MovOpc, Mips::A0, Mips::F12); 929 EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F14, LE); 932 EmitInstrRegReg(STI, MovOpc, Mips::A0, Mips::F12); 933 EmitMovFPIntPair(STI, MovOpc, Mips::A2, Mips::A3, Mips::F14, Mips::F15, LE); 936 EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F13, LE); 939 EmitMovFPIntPair(STI, MovOpc, Mip 905 EmitMovFPIntPair(const MCSubtargetInfo &STI, unsigned MovOpc, unsigned Reg1, unsigned Reg2, unsigned FPReg1, unsigned FPReg2, bool LE) argument 956 unsigned MovOpc = Mips::MFC1; local [all...] |
H A D | MipsSEInstrInfo.h | 113 unsigned CvtOpc, unsigned MovOpc, bool IsI64) const;
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H A D | MipsAsmPrinter.h | 99 void EmitMovFPIntPair(const MCSubtargetInfo &STI, unsigned MovOpc,
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H A D | MipsSEInstrInfo.cpp | 745 unsigned CvtOpc, unsigned MovOpc, 747 const MCInstrDesc &CvtDesc = get(CvtOpc), &MovDesc = get(MovOpc); 743 expandCvtFPInt(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned CvtOpc, unsigned MovOpc, bool IsI64) const argument
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86IndirectThunks.cpp | 272 const unsigned MovOpc = Is64Bit ? X86::MOV64mr : X86::MOV32mr; local 274 addRegOffset(BuildMI(CallTarget, DebugLoc(), TII->get(MovOpc)), SPReg, false,
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64InstructionSelector.cpp | 1633 const unsigned MovOpc = local 1671 I.setDesc(TII.get(MovOpc)); 3454 unsigned MovOpc = DefSize == 32 ? AArch64::FMOVSi : AArch64::FMOVDi; local 3455 I.setDesc(TII.get(MovOpc));
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUInstructionSelector.cpp | 1647 unsigned MovOpc = IsVGPR ? AMDGPU::V_MOV_B32_e32 : AMDGPU::S_MOV_B32; 1663 BuildMI(*BB, &I, DL, TII.get(MovOpc), ImmReg)
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