Searched refs:Matrix (Results 1 - 24 of 24) sorted by relevance

/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/PBQP/
H A DMath.h1 //===- Math.h - PBQP Vector and Matrix classes ------------------*- C++ -*-===//
120 /// PBQP Matrix class
121 class Matrix {
123 friend hash_code hash_value(const Matrix &);
126 /// Construct a PBQP Matrix with the given dimensions.
127 Matrix(unsigned Rows, unsigned Cols) :
131 /// Construct a PBQP Matrix with the given dimensions and initial
133 Matrix(unsigned Rows, unsigned Cols, PBQPNum InitVal)
140 Matrix(const Matrix
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H A DReductionRules.h34 using Matrix = typename GraphT::Matrix;
43 const Matrix &ECosts = G.getEdgeCosts(EId);
78 using Matrix = typename GraphT::Matrix;
96 const Matrix *YXECosts = FlipEdge1 ?
97 new Matrix(G.getEdgeCosts(YXEId).transpose()) :
100 const Matrix *ZXECosts = FlipEdge2 ?
101 new Matrix(G.getEdgeCosts(ZXEId).transpose()) :
134 const Matrix
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H A DCostAllocator.h114 using Matrix = MatrixT;
H A DGraph.h54 using Matrix = typename SolverT::Matrix;
412 "Matrix dimensions mismatch.");
438 "Matrix dimensions mismatch.");
530 const Matrix& getEdgeCosts(EdgeId EId) const {
/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DAllocationOrder.cpp32 const LiveRegMatrix *Matrix)
37 if (TRI->getRegAllocationHints(VirtReg, Order, Hints, MF, &VRM, Matrix))
29 AllocationOrder(unsigned VirtReg, const VirtRegMap &VRM, const RegisterClassInfo &RegClassInfo, const LiveRegMatrix *Matrix) argument
H A DLiveRegMatrix.cpp40 "Live Register Matrix", false, false)
44 "Live Register Matrix", false, false)
61 if (NumRegUnits != Matrix.size())
63 Matrix.init(LIUAlloc, NumRegUnits);
71 for (unsigned i = 0, e = Matrix.size(); i != e; ++i) {
72 Matrix[i].clear();
113 Matrix[Unit].unify(VirtReg, Range);
130 Matrix[Unit].extract(VirtReg, Range);
140 if (!Matrix[*Unit].empty())
181 Q.init(UserTag, LR, Matrix[RegUni
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H A DRegAllocBasic.cpp147 Matrix->unassign(LI);
165 Matrix->unassign(LI);
212 LiveIntervalUnion::Query &Q = Matrix->query(VirtReg, *Units);
235 Matrix->unassign(Spill);
262 AllocationOrder Order(VirtReg.reg, *VRM, RegClassInfo, Matrix);
265 switch (Matrix->checkInterference(VirtReg, PhysReg)) {
287 assert(!Matrix->checkInterference(VirtReg, *PhysRegI) &&
H A DAllocationOrder.h46 const LiveRegMatrix *Matrix);
H A DRegAllocBase.cpp64 Matrix = &mat;
101 Matrix->invalidateVirtRegs();
142 Matrix->assign(*VirtReg, AvailablePhysReg);
H A DRegAllocBase.h68 LiveRegMatrix *Matrix = nullptr; member in class:llvm::RegAllocBase
H A DRegAllocGreedy.cpp639 Matrix->unassign(LI);
657 Matrix->unassign(LI);
769 if (!Matrix->checkInterference(VirtReg, PhysReg))
810 AllocationOrder Order(VirtReg.reg, *VRM, RegClassInfo, Matrix);
819 LiveIntervalUnion::Query subQ(VirtReg, Matrix->getLiveUnions()[*Units]);
876 if (Matrix->checkInterference(VirtReg, PhysReg) > LiveRegMatrix::IK_VirtReg)
894 LiveIntervalUnion::Query &Q = Matrix->query(VirtReg, *Units);
976 LiveIntervalUnion::Query &Q = Matrix->query(VirtReg, *Units);
1063 LiveIntervalUnion::Query &Q = Matrix->query(VirtReg, *Units);
1082 Matrix
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H A DTargetRegisterInfo.cpp388 const LiveRegMatrix *Matrix) const {
H A DRegAllocPBQP.cpp900 const Matrix &M = getEdgeCosts(EId);
927 const Matrix &EdgeCosts = getEdgeCosts(EId);
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DLiveRegMatrix.h50 LiveIntervalUnion::Array Matrix; member in class:llvm::LiveRegMatrix
154 LiveIntervalUnion *getLiveUnions() { return &Matrix[0]; }
H A DRegAllocPBQP.h53 MatrixMetadata(const Matrix& M)
273 using RawMatrix = PBQP::Matrix;
275 using Matrix = RAMatrix;
276 using CostAllocator = PBQP::PoolCostAllocator<Vector, Matrix>;
325 void handleUpdateCosts(EdgeId EId, const Matrix& NewCosts) {
H A DTargetRegisterInfo.h785 const LiveRegMatrix *Matrix = nullptr)
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIPreAllocateWWMRegs.cpp42 LiveRegMatrix *Matrix; member in class:__anon5032::SIPreAllocateWWMRegs
109 Matrix->checkInterference(LI, PhysReg) == LiveRegMatrix::IK_Free) {
110 Matrix->assign(LI, PhysReg);
174 Matrix = &getAnalysis<LiveRegMatrix>();
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InterleavedAccess.cpp318 ArrayRef<Instruction *> Matrix,
321 // Matrix[0]= c0 c1 c2 c3 c4 ... c7
322 // Matrix[1]= m0 m1 m2 m3 m4 ... m7
323 // Matrix[2]= y0 y1 y2 y3 y4 ... y7
324 // Matrix[3]= k0 k1 k2 k3 k4 ... k7
344 Builder.CreateShuffleVector(Matrix[0], Matrix[1], MaskLow);
346 Builder.CreateShuffleVector(Matrix[2], Matrix[3], MaskLow);
358 ArrayRef<Instruction *> Matrix, SmallVectorImp
317 interleave8bitStride4VF8( ArrayRef<Instruction *> Matrix, SmallVectorImpl<Value *> &TransposedMatrix) argument
357 interleave8bitStride4( ArrayRef<Instruction *> Matrix, SmallVectorImpl<Value *> &TransposedMatrix, unsigned NumOfElm) argument
688 transpose_4x4( ArrayRef<Instruction *> Matrix, SmallVectorImpl<Value *> &TransposedMatrix) argument
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.h66 const LiveRegMatrix *Matrix) const override;
H A DSystemZRegisterInfo.cpp82 const LiveRegMatrix *Matrix) const {
88 VirtReg, Order, Hints, MF, VRM, Matrix);
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DLowerMatrixIntrinsics.cpp588 void LowerStore(Instruction *Inst, Value *Matrix, Value *Ptr, Value *Stride, argument
591 auto VType = cast<VectorType>(Matrix->getType());
593 auto LM = getMatrix(Matrix, Shape, Builder);
608 Value *Matrix = Inst->getArgOperand(0); local
611 LowerStore(Inst, Matrix, Ptr, Stride,
681 /// Cache \p Matrix as result of \p Inst and update the uses of \p Inst. For
683 /// cached value when they are lowered. For other users, \p Matrix is
686 void finalizeLowering(Instruction *Inst, ColumnMatrixTy Matrix, argument
688 Inst2ColumnMatrix.insert(std::make_pair(Inst, Matrix));
696 Flattened = Matrix
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMBaseRegisterInfo.h157 const LiveRegMatrix *Matrix) const override;
H A DARMBaseRegisterInfo.cpp306 const LiveRegMatrix *Matrix) const {
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64PBQPRegAlloc.cpp289 PBQP::Matrix costs(G.getEdgeCosts(edge));

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