Searched refs:MaskReg (Results 1 - 4 of 4) sorted by relevance

/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVExpandPseudoInsts.cpp276 Register MaskReg, Register ScratchReg) {
278 assert(OldValReg != MaskReg && "OldValReg and MaskReg must be unique");
279 assert(ScratchReg != MaskReg && "ScratchReg and MaskReg must be unique");
289 .addReg(MaskReg);
304 Register MaskReg = MI.getOperand(4).getReg(); local
346 insertMaskedMerge(TII, DL, LoopMBB, ScratchReg, DestReg, ScratchReg, MaskReg,
444 Register MaskReg = MI.getOperand(5).getReg(); local
460 .addReg(MaskReg);
273 insertMaskedMerge(const RISCVInstrInfo *TII, DebugLoc DL, MachineBasicBlock *MBB, Register DestReg, Register OldValReg, Register NewValReg, Register MaskReg, Register ScratchReg) argument
585 Register MaskReg = MI.getOperand(5).getReg(); local
[all...]
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsNaClELFStreamer.cpp101 void emitMask(unsigned AddrReg, unsigned MaskReg, argument
107 MaskInst.addOperand(MCOperand::createReg(MaskReg));
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp10815 Register MaskReg = RegInfo.createVirtualRegister(GPRC); local
10889 BuildMI(BB, dl, TII->get(PPC::SLW), MaskReg)
10903 .addReg(MaskReg);
10904 BuildMI(BB, dl, TII->get(PPC::AND), Tmp3Reg).addReg(TmpReg).addReg(MaskReg);
10911 .addReg(MaskReg);
11629 Register MaskReg = RegInfo.createVirtualRegister(GPRC); local
11715 BuildMI(BB, dl, TII->get(PPC::SLW), MaskReg)
11720 .addReg(MaskReg);
11723 .addReg(MaskReg);
11731 .addReg(MaskReg);
[all...]
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrInfo.cpp2894 // SrcReg(MaskReg) -> DestReg(GR64)
2895 // SrcReg(MaskReg) -> DestReg(GR32)
2907 // SrcReg(GR64) -> DestReg(MaskReg)
2908 // SrcReg(GR32) -> DestReg(MaskReg)
4173 Register MaskReg = MIB->getOperand(1).getReg(); local
4181 MIB.addReg(Reg, RegState::Undef).addReg(MaskReg, MaskState)

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