Searched refs:Mask1 (Results 1 - 7 of 7) sorted by relevance
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZTDC.cpp | 289 int Mask0, Mask1; local 292 std::tie(Op1, Mask1, Worthy1) = ConvertedInsts[cast<Instruction>(I.getOperand(1))]; 298 Mask = Mask0 & Mask1; 301 Mask = Mask0 | Mask1; 304 Mask = Mask0 ^ Mask1;
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | GCNRegBankReassign.cpp | 544 unsigned Mask1 = OperandMasks[I].Mask; 546 unsigned Size1 = countPopulation(Mask1); 557 unsigned FreeBanks1 = getFreeBanks(Reg1, SubReg1, Mask1, UsedBanks);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | LegalizerHelper.cpp | 3874 auto Mask1 = MIRBuilder.buildConstant(S64, 0xffffffffffULL); local 3875 auto T = MIRBuilder.buildAnd(S64, U, Mask1);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineCompares.cpp | 3046 // ctz(A) == C -> A & Mask1 == Mask2, where Mask2 only has bit C set 3047 // and Mask1 has bits 0..C+1 set. Similar for ctl, but for high bits. 3052 APInt Mask1 = IsTrailing ? APInt::getLowBitsSet(BitWidth, Num + 1) local 3057 Cmp.setOperand(0, Builder.CreateAnd(II->getArgOperand(0), Mask1));
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 18687 SmallVector<int, 16> Mask1(HalfNumElts, -1); 18695 Mask1[i - HalfNumElts] = M; 18703 !TLI.isShuffleMaskLegal(Mask1, HalfVT)) 18707 // concat (shuffle X, Y, Mask0), (shuffle X, Y, Mask1) 18711 SDValue Shuf1 = DAG.getVectorShuffle(HalfVT, DL, X, Y, Mask1);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 7224 SmallVector<int, 64> Mask0, Mask1; 7226 scaleShuffleMask<int>(MaskSize / SrcMask1.size(), SrcMask1, Mask1); 7228 if (Mask0[i] == SM_SentinelUndef && Mask1[i] == SM_SentinelUndef) 7230 else if (Mask0[i] == SM_SentinelZero && Mask1[i] == SM_SentinelZero) 7232 else if (Mask1[i] == SM_SentinelZero) 7235 Mask.push_back(Mask1[i] + (int)(MaskSize * SrcInputs0.size())); [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 5563 SDValue Mask1 = DAG.getConstant(0x80000000, dl, MVT::i32); local 5565 Tmp1 = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp1, Mask1); 12684 // (bfi A, (and B, Mask1), Mask2) -> (bfi A, B, Mask2) iff
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