Searched refs:MachineRegisterInfo (Results 1 - 25 of 353) sorted by relevance

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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUGlobalISelUtils.h18 class MachineRegisterInfo;
24 getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg);
H A DAMDGPULegalizerInfo.h35 bool legalizeCustom(MachineInstr &MI, MachineRegisterInfo &MRI,
40 MachineRegisterInfo &MRI,
43 bool legalizeAddrSpaceCast(MachineInstr &MI, MachineRegisterInfo &MRI,
45 bool legalizeFrint(MachineInstr &MI, MachineRegisterInfo &MRI,
47 bool legalizeFceil(MachineInstr &MI, MachineRegisterInfo &MRI,
49 bool legalizeIntrinsicTrunc(MachineInstr &MI, MachineRegisterInfo &MRI,
51 bool legalizeITOFP(MachineInstr &MI, MachineRegisterInfo &MRI,
53 bool legalizeMinNumMaxNum(MachineInstr &MI, MachineRegisterInfo &MRI,
55 bool legalizeExtractVectorElt(MachineInstr &MI, MachineRegisterInfo &MRI,
57 bool legalizeInsertVectorElt(MachineInstr &MI, MachineRegisterInfo
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H A DAMDGPURegisterBankInfo.h53 MachineRegisterInfo &MRI,
60 MachineRegisterInfo &MRI) const;
64 MachineRegisterInfo &MRI,
67 MachineRegisterInfo &MRI,
70 void constrainOpWithReadfirstlane(MachineInstr &MI, MachineRegisterInfo &MRI,
74 MachineRegisterInfo &MRI) const;
78 MachineRegisterInfo &MRI, int RSrcIdx) const;
82 Register handleD16VData(MachineIRBuilder &B, MachineRegisterInfo &MRI,
97 unsigned getRegBankID(Register Reg, const MachineRegisterInfo &MRI,
103 const MachineRegisterInfo
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H A DSIRegisterInfo.h19 #include "llvm/CodeGen/MachineRegisterInfo.h"
25 class MachineRegisterInfo;
138 bool isSGPRReg(const MachineRegisterInfo &MRI, unsigned Reg) const {
199 unsigned findUnusedRegister(const MachineRegisterInfo &MRI,
207 const TargetRegisterClass *getRegClassForReg(const MachineRegisterInfo &MRI,
209 bool isVGPR(const MachineRegisterInfo &MRI, unsigned Reg) const;
210 bool isAGPR(const MachineRegisterInfo &MRI, unsigned Reg) const;
211 bool isVectorRegister(const MachineRegisterInfo &MRI, unsigned Reg) const {
257 const MachineRegisterInfo &MRI) const;
262 const MachineRegisterInfo
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H A DAMDGPUMacroFusion.cpp45 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
H A DGCNRegPressure.h25 class MachineRegisterInfo;
62 const MachineRegisterInfo &MRI);
85 static unsigned getRegKind(unsigned Reg, const MachineRegisterInfo &MRI);
107 mutable const MachineRegisterInfo *MRI = nullptr;
133 const MachineRegisterInfo &MRI);
190 const MachineRegisterInfo &MRI);
194 const MachineRegisterInfo &MRI);
253 GCNRegPressure getRegPressure(const MachineRegisterInfo &MRI,
266 const MachineRegisterInfo &MRI);
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMachineLoopUtils.h15 class MachineRegisterInfo;
37 MachineRegisterInfo &MRI,
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsLegalizerInfo.h28 bool legalizeCustom(MachineInstr &MI, MachineRegisterInfo &MRI,
32 bool legalizeIntrinsic(MachineInstr &MI, MachineRegisterInfo &MRI,
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DUtils.h30 class MachineRegisterInfo;
45 unsigned constrainRegToClass(MachineRegisterInfo &MRI,
59 MachineRegisterInfo &MRI,
77 MachineRegisterInfo &MRI,
98 bool isTriviallyDead(const MachineInstr &MI, const MachineRegisterInfo &MRI);
114 const MachineRegisterInfo &MRI);
129 getConstantVRegValWithLookThrough(unsigned VReg, const MachineRegisterInfo &MRI,
133 const MachineRegisterInfo &MRI);
139 const MachineRegisterInfo &MRI);
145 const MachineRegisterInfo
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H A DCombiner.h21 class MachineRegisterInfo;
39 MachineRegisterInfo *MRI = nullptr;
H A DLegalizer.h28 class MachineRegisterInfo;
66 bool combineExtracts(MachineInstr &MI, MachineRegisterInfo &MRI,
H A DLocalizer.h30 class MachineRegisterInfo;
51 MachineRegisterInfo *MRI;
H A DMIPatternMatch.h18 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 bool mi_match(Reg R, const MachineRegisterInfo &MRI, Pattern &&P) {
33 bool match(const MachineRegisterInfo &MRI, unsigned Reg) {
46 bool match(const MachineRegisterInfo &MRI, unsigned Reg) {
63 bool match(const MachineRegisterInfo &MRI, unsigned Reg) { return true; }
64 bool match(const MachineRegisterInfo &MRI, MachineOperand *MO) {
74 bool match(const MachineRegisterInfo &MRI, MatchSrc &&src) {
86 bool match(const MachineRegisterInfo &MRI, MatchSrc &&src) {
93 bool match(const MachineRegisterInfo &MRI, MatchSrc &&src) {
104 bool match(const MachineRegisterInfo
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64LegalizerInfo.h30 bool legalizeCustom(MachineInstr &MI, MachineRegisterInfo &MRI,
34 bool legalizeIntrinsic(MachineInstr &MI, MachineRegisterInfo &MRI,
38 bool legalizeVaArg(MachineInstr &MI, MachineRegisterInfo &MRI,
40 bool legalizeLoadStore(MachineInstr &MI, MachineRegisterInfo &MRI,
43 bool legalizeShlAshrLshr(MachineInstr &MI, MachineRegisterInfo &MRI,
H A DAArch64RegisterBankInfo.h118 bool hasFPConstraints(const MachineInstr &MI, const MachineRegisterInfo &MRI,
122 bool onlyUsesFP(const MachineInstr &MI, const MachineRegisterInfo &MRI,
126 bool onlyDefinesFP(const MachineInstr &MI, const MachineRegisterInfo &MRI,
/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineRegisterInfo.cpp1 //===- lib/Codegen/MachineRegisterInfo.cpp --------------------------------===//
9 // Implementation of the MachineRegisterInfo class.
13 #include "llvm/CodeGen/MachineRegisterInfo.h"
42 void MachineRegisterInfo::Delegate::anchor() {}
44 MachineRegisterInfo::MachineRegisterInfo(MachineFunction *MF) function in class:MachineRegisterInfo
58 MachineRegisterInfo::setRegClass(unsigned Reg, const TargetRegisterClass *RC) {
63 void MachineRegisterInfo::setRegBank(unsigned Reg,
69 constrainRegClass(MachineRegisterInfo &MRI, unsigned Reg,
85 MachineRegisterInfo
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86CallLowering.h24 class MachineRegisterInfo;
46 const DataLayout &DL, MachineRegisterInfo &MRI,
H A DX86LegalizerInfo.h35 bool legalizeIntrinsic(MachineInstr &MI, MachineRegisterInfo &MRI,
/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DInstructionSelector.cpp20 #include "llvm/CodeGen/MachineRegisterInfo.h"
42 MachineRegisterInfo &MRI = MF.getRegInfo();
50 const MachineRegisterInfo &MRI) const {
58 const MachineOperand &Root, const MachineRegisterInfo &MRI) const {
H A DGISelChangeObserver.cpp14 #include "llvm/CodeGen/MachineRegisterInfo.h"
19 const MachineRegisterInfo &MRI, unsigned Reg) {
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DRDFDeadCode.h31 class MachineRegisterInfo;
35 DeadCodeElimination(DataFlowGraph &dfg, MachineRegisterInfo &mri)
53 MachineRegisterInfo &MRI;
H A DHexagonFrameLowering.h27 class MachineRegisterInfo;
129 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
132 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
135 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
138 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
141 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
144 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
147 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
150 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
153 MachineRegisterInfo
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCVSXCopy.cpp28 #include "llvm/CodeGen/MachineRegisterInfo.h"
52 MachineRegisterInfo &MRI) {
62 bool IsVSReg(unsigned Reg, MachineRegisterInfo &MRI) {
66 bool IsVRReg(unsigned Reg, MachineRegisterInfo &MRI) {
70 bool IsF8Reg(unsigned Reg, MachineRegisterInfo &MRI) {
74 bool IsVSFReg(unsigned Reg, MachineRegisterInfo &MRI) {
78 bool IsVSSReg(unsigned Reg, MachineRegisterInfo &MRI) {
86 MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMLegalizerInfo.h31 bool legalizeCustom(MachineInstr &MI, MachineRegisterInfo &MRI,
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFMISimplifyPatchable.cpp32 #include "llvm/CodeGen/MachineRegisterInfo.h"
56 void processCandidate(MachineRegisterInfo *MRI, MachineBasicBlock &MBB,
59 void processDstReg(MachineRegisterInfo *MRI, Register &DstReg,
62 void processInst(MachineRegisterInfo *MRI, MachineInstr *Inst,
64 void checkADDrr(MachineRegisterInfo *MRI, MachineOperand *RelocOp,
66 void checkShift(MachineRegisterInfo *MRI, MachineBasicBlock &MBB,
88 void BPFMISimplifyPatchable::checkADDrr(MachineRegisterInfo *MRI,
142 void BPFMISimplifyPatchable::checkShift(MachineRegisterInfo *MRI,
156 void BPFMISimplifyPatchable::processCandidate(MachineRegisterInfo *MRI,
189 void BPFMISimplifyPatchable::processDstReg(MachineRegisterInfo *MR
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