Searched refs:Lg2 (Results 1 - 8 of 8) sorted by relevance

/freebsd-12-stable/lib/msun/src/
H A Dk_logf.h22 Lg2 = 0xccce13.0p-25, /* 0.40000972152 */ variable
34 t1= w*(Lg2+w*Lg4);
H A Dk_log.h40 * R(z) ~ Lg1*s +Lg2*s +Lg3*s +Lg4*s +Lg5*s +Lg6*s +Lg7*s
76 Lg2 = 3.999999999940941908e-01, /* 3FD99999 9997FA04 */ variable
95 t1= w*(Lg2+w*(Lg4+w*Lg6));
H A De_log.c34 * R(z) ~ Lg1*s +Lg2*s +Lg3*s +Lg4*s +Lg5*s +Lg6*s +Lg7*s
78 Lg2 = 3.999999999940941908e-01, /* 3FD99999 9997FA04 */ variable
131 t1= w*(Lg2+w*(Lg4+w*Lg6));
H A De_logf.c28 Lg2 = 0xccce13.0p-25, /* 0.40000972152 */ variable
77 t1= w*(Lg2+w*Lg4);
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp4939 unsigned Lg2 = C.countTrailingZeros(); local
4946 unsigned ResultReg = emitASR_ri(VT, VT, Src0Reg, Src0IsKill, Lg2);
4953 int64_t Pow2MinusOne = (1ULL << Lg2) - 1;
4983 SelectReg, /*IsKill=*/true, AArch64_AM::ASR, Lg2);
4985 ResultReg = emitASR_ri(VT, VT, SelectReg, /*IsKill=*/true, Lg2);
H A DAArch64ISelLowering.cpp9707 unsigned Lg2 = Divisor.countTrailingZeros(); local
9709 SDValue Pow2MinusOne = DAG.getConstant((1ULL << Lg2) - 1, DL, VT);
9723 DAG.getNode(ISD::SRA, DL, VT, CSel, DAG.getConstant(Lg2, DL, MVT::i64));
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp14455 unsigned Lg2 = (IsNegPow2 ? -Divisor : Divisor).countTrailingZeros(); local
14456 SDValue ShiftAmt = DAG.getConstant(Lg2, DL, VT);
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp21036 unsigned Lg2 = Divisor.countTrailingZeros();
21039 if (Lg2 == 1)
21045 APInt Lg2Mask = APInt::getLowBitsSet(VT.getSizeInBits(), Lg2);
21059 DAG.getNode(ISD::SRA, DL, VT, CMov, DAG.getConstant(Lg2, DL, MVT::i8));
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