| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsAnalyzeImmediate.cpp | 83 // Replace a ADDiu & SLL pair with a LUi.
88 // LUi 0x444
104 Seq[0].Opc = LUi;
137 LUi = Mips::LUi;
142 LUi = Mips::LUi64;
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| H A D | MipsAnalyzeImmediate.h | 52 /// ReplaceADDiuSLLWithLUi - Replace an ADDiu & SLL pair with a LUi.
60 unsigned ADDiu, ORi, SLL, LUi; member in class:llvm::MipsAnalyzeImmediate
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| H A D | MipsInstructionSelector.cpp | 150 MachineInstr *Inst = B.buildInstr(Mips::LUi, {DestReg}, {})
163 MachineInstr *LUi = B.buildInstr(Mips::LUi, {LUiReg}, {}) local
167 if (!constrainSelectedInstRegOperands(*LUi, TII, TRI, RBI))
605 MachineInstr *LUi = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::LUi)) local
608 LUi->getOperand(1).setTargetFlags(MipsII::MO_ABS_HI);
609 if (!constrainSelectedInstRegOperands(*LUi, TII, TRI, RBI))
636 BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::LUi))
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| H A D | MipsMachineFunction.cpp | 102 BuildMI(MBB, I, DL, TII.get(Mips::LUi), V0)
117 BuildMI(MBB, I, DL, TII.get(Mips::LUi), V0)
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| H A D | MipsMCInstLower.cpp | 216 OutMI.setOpcode(Mips::LUi);
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| H A D | MipsSEISelDAGToDAG.cpp | 812 // The first instruction can be a LUi which is different from other
1072 Res = CurDAG->getMachineNode(Mips::LUi, DL, MVT::i32, HiVal);
1095 Res = CurDAG->getMachineNode(Mips::LUi, DL, MVT::i32, HiVal);
1160 // bits that's a negative number we can do better than LUi/ORi
1164 Res = CurDAG->getMachineNode(Mips::LUi, DL, MVT::i32, HiVal);
1172 HiRes = CurDAG->getMachineNode(Mips::LUi, DL, MVT::i32, HighestVal);
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| H A D | MipsSEInstrInfo.cpp | 611 unsigned LUi = STI.isABI_N64() ? Mips::LUi64 : Mips::LUi; local
623 // The first instruction can be a LUi, which is different from other
628 if (Inst->Opc == LUi)
629 BuildMI(MBB, II, DL, get(LUi), Reg).addImm(SignExtend64<16>(Inst->ImmOpnd));
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| H A D | MipsBranchExpansion.cpp | 464 // LUi and ADDiu instructions create 32-bit offset of the target basic
473 // we replace LUi and ADDiu with pseudo instructions
476 // instructions to LUi and ADDiu in the MC layer, we will create
724 BuildMI(MBB, I, DL, TII->get(Mips::LUi), Mips::V0)
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| H A D | MipsFastISel.cpp | 381 emitInst(Mips::LUi, TmpReg).addImm(Hi);
384 emitInst(Mips::LUi, ResultReg).addImm(Hi);
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsTargetStreamer.cpp | 323 emitRI(Mips::LUi, ATReg, HiOffset, IDLoc, STI);
359 emitRI(Mips::LUi, TmpReg, HiOffset, IDLoc, STI);
1134 TmpInst.setOpcode(Mips::LUi);
1226 emitRX(Mips::LUi, GPReg, MCOperand::createExpr(HiExpr), SMLoc(), &STI);
1243 emitRX(Mips::LUi, GPReg, MCOperand::createExpr(HiExpr), SMLoc(), &STI);
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 2750 TOut.emitRI(Mips::LUi, TmpReg, 0xffff, IDLoc, STI);
2757 // Expand to an ORi instead of a LUi to avoid sign-extending into the
2768 TOut.emitRI(Mips::LUi, TmpReg, Bits31To16, IDLoc, STI);
2920 TOut.emitRX(Mips::LUi, DstReg, MCOperand::createExpr(CallHiExpr), IDLoc,
2965 TOut.emitRX(Mips::LUi, TmpReg, MCOperand::createExpr(CallHiExpr), IDLoc,
3083 TOut.emitRX(Mips::LUi, ATReg, MCOperand::createExpr(HighestExpr), IDLoc,
3110 TOut.emitRX(Mips::LUi, DstReg, MCOperand::createExpr(HighestExpr), IDLoc,
3112 TOut.emitRX(Mips::LUi, ATReg, MCOperand::createExpr(HiExpr), IDLoc, STI);
3133 TOut.emitRX(Mips::LUi, DstReg, MCOperand::createExpr(HighestExpr), IDLoc,
3178 TOut.emitRX(Mips::LUi, TmpRe
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