/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyOptimizeLiveIntervals.cpp | 74 auto &LIS = getAnalysis<LiveIntervals>(); local 88 LIS.splitSeparateComponents(LIS.getInterval(Reg), SplitLIs); 99 LiveInterval &LI = LIS.getInterval(MI->getOperand(0).getReg()); 100 LIS.removeVRegDefAt(LI, LIS.getInstructionIndex(*MI).getRegSlot()); 101 LIS.RemoveMachineInstrFromMaps(*MI);
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H A D | WebAssemblyMemIntrinsicResults.cpp | 88 LiveIntervals &LIS) { 91 LiveInterval *FromLI = &LIS.getInterval(FromReg); 92 LiveInterval *ToLI = &LIS.getInterval(ToReg); 94 SlotIndex FromIdx = LIS.getInstructionIndex(MI).getRegSlot(); 109 SlotIndex WhereIdx = LIS.getInstructionIndex(*Where); 134 LIS.extendToIndices(*ToLI, Indices); 137 LIS.shrinkToUses(FromLI); 151 MachineDominatorTree &MDT, LiveIntervals &LIS, 174 return replaceDominatedUses(MBB, MI, FromReg, ToReg, MRI, MDT, LIS); 189 auto &LIS local 84 replaceDominatedUses(MachineBasicBlock &MBB, MachineInstr &MI, unsigned FromReg, unsigned ToReg, const MachineRegisterInfo &MRI, MachineDominatorTree &MDT, LiveIntervals &LIS) argument 149 optimizeCall(MachineBasicBlock &MBB, MachineInstr &MI, const MachineRegisterInfo &MRI, MachineDominatorTree &MDT, LiveIntervals &LIS, const WebAssemblyTargetLowering &TLI, const TargetLibraryInfo &LibInfo) argument [all...] |
H A D | WebAssemblyRegStackify.cpp | 102 LiveIntervals &LIS) { 129 LIS.InsertMachineInstrInMaps(*Const); 271 const LiveIntervals &LIS) { 276 // MRI doesn't know what the Def is. Try asking LIS. 277 if (const VNInfo *ValNo = LIS.getInterval(Reg).getVNInfoBefore( 278 LIS.getInstructionIndex(*Insert))) 279 return LIS.getInstructionFromIndex(ValNo->def); 288 MachineDominatorTree &MDT, LiveIntervals &LIS) { 294 const LiveInterval &LI = LIS.getInterval(Reg); 296 LI.getVNInfoAt(LIS 98 convertImplicitDefToConstZero(MachineInstr *MI, MachineRegisterInfo &MRI, const TargetInstrInfo *TII, MachineFunction &MF, LiveIntervals &LIS) argument 269 getVRegDef(unsigned Reg, const MachineInstr *Insert, const MachineRegisterInfo &MRI, const LiveIntervals &LIS) argument 287 hasOneUse(unsigned Reg, MachineInstr *Def, MachineRegisterInfo &MRI, MachineDominatorTree &MDT, LiveIntervals &LIS) argument 400 oneUseDominatesOtherUses(unsigned Reg, const MachineOperand &OneUse, const MachineBasicBlock &MBB, const MachineRegisterInfo &MRI, const MachineDominatorTree &MDT, LiveIntervals &LIS, WebAssemblyFunctionInfo &MFI) argument 474 shrinkToUses(LiveInterval &LI, LiveIntervals &LIS) argument 483 moveForSingleUse(unsigned Reg, MachineOperand &Op, MachineInstr *Def, MachineBasicBlock &MBB, MachineInstr *Insert, LiveIntervals &LIS, WebAssemblyFunctionInfo &MFI, MachineRegisterInfo &MRI) argument 528 rematerializeCheapDef( unsigned Reg, MachineOperand &Op, MachineInstr &Def, MachineBasicBlock &MBB, MachineBasicBlock::instr_iterator Insert, LiveIntervals &LIS, WebAssemblyFunctionInfo &MFI, MachineRegisterInfo &MRI, const WebAssemblyInstrInfo *TII, const WebAssemblyRegisterInfo *TRI) argument 596 moveAndTeeForMultiUse( unsigned Reg, MachineOperand &Op, MachineInstr *Def, MachineBasicBlock &MBB, MachineInstr *Insert, LiveIntervals &LIS, WebAssemblyFunctionInfo &MFI, MachineRegisterInfo &MRI, const WebAssemblyInstrInfo *TII) argument 780 auto &LIS = getAnalysis<LiveIntervals>(); local [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | LiveRangeEdit.cpp | 39 LiveInterval &LI = LIS.createEmptyInterval(VReg); 46 LiveInterval &OldLI = LIS.getInterval(OldReg); 47 VNInfo::Allocator &Alloc = LIS.getVNInfoAllocator(); 66 LIS.getInterval(VReg).markNotSpillable(); 86 LiveInterval &OrigLI = LIS.getInterval(Original); 90 MachineInstr *DefMI = LIS.getInstructionFromIndex(OrigVNI->def); 123 LiveInterval &li = LIS.getInterval(MO.getReg()); 151 DefIdx = LIS.getInstructionIndex(*RM.OrigMI); 177 return LIS.getSlotIndexes()->insertMachineInstrInMaps(*MI, Late).getRegSlot(); 182 LIS [all...] |
H A D | PHIElimination.cpp | 70 LiveIntervals *LIS; member in class:__anon4610::PHIElimination 150 LIS = getAnalysisIfAvailable<LiveIntervals>(); 158 if (!DisableEdgeSplitting && (LV || LIS)) { 175 if (LIS) 176 LIS->RemoveMachineInstrFromMaps(*DefMI); 183 if (LIS) 184 LIS->RemoveMachineInstrFromMaps(*I.first); 327 if (LIS) { 328 SlotIndex DestCopyIndex = LIS->InsertMachineInstrInMaps(*PHICopy); 330 SlotIndex MBBStartIndex = LIS [all...] |
H A D | LiveDebugVariables.cpp | 178 unsigned SpillOffset, LiveIntervals &LIS, 185 LiveIntervals &LIS); 312 /// \param LIS Live intervals analysis. 316 LiveIntervals &LIS); 331 MachineRegisterInfo &MRI, LiveIntervals &LIS); 336 LiveIntervals &LIS, LexicalScopes &LS); 341 LiveIntervals &LIS); 352 void emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS, 372 LiveIntervals &LIS, const TargetInstrInfo &TII); 386 void emitDebugLabel(LiveIntervals &LIS, cons 399 LiveIntervals *LIS; member in class:__anon4565::LDVImpl 733 extendDef(SlotIndex Idx, DbgValueLocation Loc, LiveRange *LR, const VNInfo *VNI, SmallVectorImpl<SlotIndex> *Kills, LiveIntervals &LIS) argument 777 addDefsFromCopies( LiveInterval *LI, unsigned LocNo, bool WasIndirect, const SmallVectorImpl<SlotIndex> &Kills, SmallVectorImpl<std::pair<SlotIndex, DbgValueLocation>> &NewDefs, MachineRegisterInfo &MRI, LiveIntervals &LIS) argument 850 computeIntervals(MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI, LiveIntervals &LIS, LexicalScopes &LS) argument 1041 splitLocation(unsigned OldLocNo, ArrayRef<unsigned> NewRegs, LiveIntervals& LIS) argument 1137 splitRegister(unsigned OldReg, ArrayRef<unsigned> NewRegs, LiveIntervals &LIS) argument 1167 splitRegister(unsigned OldReg, ArrayRef<unsigned> NewRegs, LiveIntervals &LIS) argument 1258 findInsertLocation(MachineBasicBlock *MBB, SlotIndex Idx, LiveIntervals &LIS) argument 1282 findNextInsertLocation(MachineBasicBlock *MBB, MachineBasicBlock::iterator I, SlotIndex StopIdx, MachineOperand &LocMO, LiveIntervals &LIS, const TargetRegisterInfo &TRI) argument 1304 insertDebugValue(MachineBasicBlock *MBB, SlotIndex StartIdx, SlotIndex StopIdx, DbgValueLocation Loc, bool Spilled, unsigned SpillOffset, LiveIntervals &LIS, const TargetInstrInfo &TII, const TargetRegisterInfo &TRI) argument 1355 insertDebugLabel(MachineBasicBlock *MBB, SlotIndex Idx, LiveIntervals &LIS, const TargetInstrInfo &TII) argument 1364 emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS, const TargetInstrInfo &TII, const TargetRegisterInfo &TRI, const SpillOffsetMap &SpillOffsets) argument 1412 emitDebugLabel(LiveIntervals &LIS, const TargetInstrInfo &TII) argument [all...] |
H A D | CalcSpillWeights.cpp | 31 void llvm::calculateSpillWeightsAndHints(LiveIntervals &LIS, argument 41 VirtRegAuxInfo VRAI(MF, LIS, VRM, MLI, MBFI, norm); 46 VRAI.calculateSpillWeightAndHint(LIS.getInterval(Reg)); 86 const LiveIntervals &LIS, 99 MachineInstr *MI = LIS.getInstructionFromIndex(VNI->def); 121 const LiveInterval &SrcLI = LIS.getInterval(Reg); 127 MI = LIS.getInstructionFromIndex(VNI->def); 132 if (!TII.isTriviallyReMaterializable(*MI, LIS.getAliasAnalysis())) 173 MachineBasicBlock *localMBB = LIS.getMBBFromIndex(*end); 174 assert(localMBB == LIS 85 isRematerializable(const LiveInterval &LI, const LiveIntervals &LIS, VirtRegMap *VRM, const TargetInstrInfo &TII) argument [all...] |
H A D | RegAllocBase.cpp | 63 LIS = &lis; 79 enqueue(&LIS->getInterval(Reg)); 96 LIS->removeInterval(VirtReg->reg); 145 assert(LIS->hasInterval(Reg)); 147 LiveInterval *SplitVirtReg = &LIS->getInterval(Reg); 153 LIS->removeInterval(SplitVirtReg->reg); 168 LIS->RemoveMachineInstrFromMaps(*DeadInst);
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H A D | RenameIndependentSubregs.cpp | 72 SubRangeInfo(LiveIntervals &LIS, LiveInterval::SubRange &SR, argument 74 : ConEQ(LIS), SR(&SR), Index(Index) {} 104 LiveIntervals *LIS; member in class:__anon4634::RenameIndependentSubregs 143 LiveInterval &NewLI = LIS->createEmptyInterval(NewVReg); 162 SubRangeInfos.push_back(SubRangeInfo(*LIS, SR, NumComponents)); 189 SlotIndex Pos = LIS->getInstructionIndex(*MO.getParent()); 223 SlotIndex Pos = LIS->getInstructionIndex(*MI); 271 BumpPtrAllocator &Allocator = LIS->getVNInfoAllocator(); 303 BumpPtrAllocator &Allocator = LIS->getVNInfoAllocator(); 304 const SlotIndexes &Indexes = *LIS [all...] |
H A D | LiveDebugVariables.h | 45 LiveIntervals &LIS);
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H A D | TwoAddressInstructionPass.cpp | 99 LiveIntervals *LIS; member in class:__anon4668::TwoAddressInstructionPass 210 static bool isPlainlyKilled(MachineInstr *MI, unsigned Reg, LiveIntervals *LIS); 251 if (LIS) { 252 LiveInterval &LI = LIS->getInterval(SavedReg); 256 SlotIndex MBBEndIdx = LIS->getMBBEndIdx(MBB).getPrevSlot(); 262 KillMI = LIS->getInstructionFromIndex(I->end); 308 if (MO.isKill() || (LIS && isPlainlyKilled(&OtherMI, MOReg, LIS))) { 321 if (!LIS) { 335 if (LIS) 428 isPlainlyKilled(MachineInstr *MI, unsigned Reg, LiveIntervals *LIS) argument 469 isKilled(MachineInstr &MI, unsigned Reg, const MachineRegisterInfo *MRI, const TargetInstrInfo *TII, LiveIntervals *LIS, bool allowFalsePositives) argument [all...] |
H A D | RegAllocPBQP.cpp | 163 void findVRegIntervalsToAlloc(const MachineFunction &MF, LiveIntervals &LIS); 170 MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM, 182 void finalizeAlloc(MachineFunction &MF, LiveIntervals &LIS, 185 void postOptimization(Spiller &VRegSpiller, LiveIntervals &LIS); 194 LiveIntervals &LIS = G.getMetadata().LIS; variable 202 LIS.getInterval(G.getNodeMetadata(NId).getVReg()).weight; 311 LiveIntervals &LIS = G.getMetadata().LIS; variable 335 LiveInterval &LI = LIS 555 findVRegIntervalsToAlloc(const MachineFunction &MF, LiveIntervals &LIS) argument 581 LiveIntervals &LIS = G.getMetadata().LIS; local 676 spillVReg(unsigned VReg, SmallVectorImpl<unsigned> &NewIntervals, MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM, Spiller &VRegSpiller) argument 708 LiveIntervals &LIS = G.getMetadata().LIS; local 742 finalizeAlloc(MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM) const argument 772 postOptimization(Spiller &VRegSpiller, LiveIntervals &LIS) argument 790 LiveIntervals &LIS = getAnalysis<LiveIntervals>(); local [all...] |
H A D | SplitKit.cpp | 73 : LIS(lis), LastInsertPoint(BBNum) {} 80 SlotIndex MBBEnd = LIS.getMBBEndIdx(&MBB); 94 LIP.first = LIS.getInstructionIndex(*FirstTerm); 105 LIP.second = LIS.getInstructionIndex(*I); 117 return LIS.isLiveInToMBB(CurLI, EHPad); 142 if (LIP == LIS.getMBBEndIdx(&MBB)) 144 return LIS.getInstructionFromIndex(LIP); 153 : MF(vrm.getMachineFunction()), VRM(vrm), LIS(lis), Loops(mli), 178 UseSlots.push_back(LIS.getInstructionIndex(*MO.getParent()).getRegSlot()); 195 const_cast<LiveIntervals&>(LIS) [all...] |
H A D | InlineSpiller.cpp | 87 LiveIntervals &LIS; member in class:__anon4558::HoistSpillHelper 141 : MF(mf), LIS(pass.getAnalysis<LiveIntervals>()), 149 IPA(LIS, mf.getNumBlockIDs()) {} 160 LiveIntervals &LIS; member in class:__anon4558::InlineSpiller 197 : MF(mf), LIS(pass.getAnalysis<LiveIntervals>()), 284 if (SnipLI.getNumValNums() > 2 || !LIS.intervalIsInOneMBB(SnipLI)) 336 LiveInterval &SnipLI = LIS.getInterval(SnipReg); 373 SlotIndex Idx = LIS.getInstructionIndex(CopyMI); 380 LiveInterval &SrcLI = LIS.getInterval(SrcReg); 383 MachineBasicBlock *DefMBB = LIS 749 dumpMachineInstrRangeWithSlotIndex(MachineBasicBlock::iterator B, MachineBasicBlock::iterator E, LiveIntervals const &LIS, const char *const header, unsigned VReg =0) argument 952 LLVM_DEBUG(dumpMachineInstrRangeWithSlotIndex(std::next(MI), MIS.end(), LIS, local [all...] |
H A D | RegisterCoalescer.cpp | 131 LiveIntervals *LIS = nullptr; member in class:__anon4630::RegisterCoalescer 326 if (LIS->shrinkToUses(LI, Dead)) { 330 LIS->splitSeparateComponents(*LI, SplitLIs); 340 LIS->RemoveMachineInstrFromMaps(*MI); 575 LiveRangeEdit(nullptr, NewRegs, *MF, *LIS, 590 LIS->getInterval(CP.isFlipped() ? CP.getDstReg() : CP.getSrcReg()); 592 LIS->getInterval(CP.isFlipped() ? CP.getSrcReg() : CP.getDstReg()); 593 SlotIndex CopyIdx = LIS->getInstructionIndex(*CopyMI).getRegSlot(); 629 MachineInstr *ACopyMI = LIS->getInstructionFromIndex(AValNo->def); 643 LIS 2225 LiveIntervals *LIS; member in class:__anon4631::JoinVals 3638 isLocalCopy(MachineInstr *Copy, const LiveIntervals *LIS) argument [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | GCNRegPressure.h | 103 const LiveIntervals &LIS; member in class:llvm::GCNRPTracker 109 GCNRPTracker(const LiveIntervals &LIS_) : LIS(LIS_) {} 141 // filling live regs upon this point using LIS 148 // to reported by LIS 164 // filling live regs upon this point using LIS. 189 const LiveIntervals &LIS, 193 const LiveIntervals &LIS, 203 getLiveRegMap(Range &&R, bool After, LiveIntervals &LIS) { argument 206 auto &SII = *LIS.getSlotIndexes(); 218 if (!LIS 240 getLiveRegsAfter(const MachineInstr &MI, const LiveIntervals &LIS) argument 246 getLiveRegsBefore(const MachineInstr &MI, const LiveIntervals &LIS) argument [all...] |
H A D | SILowerControlFlow.cpp | 82 LiveIntervals *LIS = nullptr; member in class:__anon5022::SILowerControlFlow 252 if (!LIS) { 257 LIS->InsertMachineInstrInMaps(*CopyExec); 261 LIS->ReplaceMachineInstrInMaps(MI, *And); 264 LIS->InsertMachineInstrInMaps(*Xor); 265 LIS->InsertMachineInstrInMaps(*SetExec); 266 LIS->InsertMachineInstrInMaps(*NewBr); 268 LIS->removeAllRegUnitsForPhysReg(AMDGPU::EXEC); 274 LIS->removeInterval(SaveExecReg); 275 LIS [all...] |
H A D | SIOptimizeExecMaskingPreRA.cpp | 192 LiveIntervals *LIS) { 209 *I, MRI, LIS); 225 auto *Cmp = TRI->findReachingDef(CmpReg, CmpSubReg, *And, MRI, LIS); 239 auto *Sel = TRI->findReachingDef(SelReg, Op1->getSubReg(), *Cmp, MRI, LIS); 258 LIS->RemoveMachineInstrFromMaps(*And); 265 LIS->InsertMachineInstrInMaps(*Andn2); 279 LIS->RemoveMachineInstrFromMaps(*Cmp); 286 LIS->RemoveMachineInstrFromMaps(*Sel); 304 LiveIntervals *LIS = &getAnalysis<LiveIntervals>(); local 311 if (unsigned Reg = optimizeVcndVcmpPair(MBB, ST, MRI, LIS)) { 189 optimizeVcndVcmpPair(MachineBasicBlock &MBB, const GCNSubtarget &ST, MachineRegisterInfo &MRI, LiveIntervals *LIS) argument [all...] |
H A D | GCNIterativeScheduler.cpp | 63 const LiveIntervals *LIS, 72 if (!I->isDebugInstr() && LIS) 73 OS << LIS->getInstructionIndex(*I); 79 if (!I->isDebugInstr() && LIS) 80 OS << LIS->getInstructionIndex(*I); 85 if (LIS) OS << LIS->getInstructionIndex(*End) << '\t'; 94 const LiveIntervals *LIS) { 98 const auto LiveIns = getLiveRegsBefore(*Begin, *LIS); 103 const auto LiveOuts = getLiveRegsAfter(*BottomMI, *LIS); 60 printRegion(raw_ostream &OS, MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, const LiveIntervals *LIS, unsigned MaxInstNum = std::numeric_limits<unsigned>::max()) argument 91 printLivenessInfo(raw_ostream &OS, MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, const LiveIntervals *LIS) argument 462 LLVM_DEBUG(printRegion(dbgs(), R->Begin, R->End, LIS, 3); local 463 printLivenessInfo(dbgs(), R->Begin, R->End, LIS)); local [all...] |
H A D | GCNRegPressure.cpp | 37 const LiveIntervals &LIS, 40 << *LIS.getInstructionFromIndex(SI); 44 if (!LIS.hasInterval(Reg)) 46 const auto &LI = LIS.getInterval(Reg); 204 // use mask has been tracked before using LIS. 212 const LiveIntervals &LIS) { 222 // For a tentative schedule LIS isn't updated yet but livemask should remain 225 auto SI = LIS.getInstructionIndex(*MO.getParent()).getBaseIndex(); 226 return getLiveLaneMask(MO.getReg(), SI, LIS, MRI); 230 collectVirtualRegUses(const MachineInstr &MI, const LiveIntervals &LIS, 36 printLivesAt(SlotIndex SI, const LiveIntervals &LIS, const MachineRegisterInfo &MRI) argument [all...] |
H A D | SILowerSGPRSpills.cpp | 52 LiveIntervals *LIS = nullptr; member in class:__anon5025::SILowerSGPRSpills 90 LiveIntervals *LIS) { 108 if (LIS) { 112 LIS->InsertMachineInstrInMaps(Inst); 113 LIS->removeAllRegUnitsForPhysReg(Reg); 122 LiveIntervals *LIS) { 144 if (LIS) { 146 LIS->InsertMachineInstrInMaps(Inst); 147 LIS->removeAllRegUnitsForPhysReg(Reg); 220 insertCSRSaves(*SaveBlock, CSI, LIS); 88 insertCSRSaves(MachineBasicBlock &SaveBlock, ArrayRef<CalleeSavedInfo> CSI, LiveIntervals *LIS) argument 120 insertCSRRestores(MachineBasicBlock &RestoreBlock, std::vector<CalleeSavedInfo> &CSI, LiveIntervals *LIS) argument [all...] |
H A D | SIPreAllocateWWMRegs.cpp | 41 LiveIntervals *LIS; member in class:__anon5032::SIPreAllocateWWMRegs 105 LiveInterval &LI = LIS->getInterval(Reg); 151 LIS->removeInterval(Reg); 173 LIS = &getAnalysis<LiveIntervals>();
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/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | CalcSpillWeights.h | 52 LiveIntervals &LIS; member in class:llvm::VirtRegAuxInfo 64 : MF(mf), LIS(lis), VRM(vrm), Loops(loops), MBFI(mbfi), normalize(norm) {} 98 void calculateSpillWeightsAndHints(LiveIntervals &LIS, MachineFunction &MF,
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCVSXFMAMutate.cpp | 67 LiveIntervals *LIS; member in struct:__anon5320::PPCVSXFMAMutate 109 SlotIndex FMAIdx = LIS->getInstructionIndex(MI); 112 LIS->getInterval(MI.getOperand(1).getReg()).Query(FMAIdx).valueIn(); 118 MachineInstr *AddendMI = LIS->getInstructionFromIndex(AddendValNo->def); 192 if (LIS->getInterval(Reg2).Query(FMAIdx).isKill() 196 } else if (LIS->getInterval(Reg3).Query(FMAIdx).isKill() 213 !LIS->getInterval(AddendSrcReg).liveAt(FMAIdx)) 281 LiveInterval &FMAInt = LIS->getInterval(OldFMAReg); 299 LiveInterval &NewFMAInt = LIS->getInterval(KilledProdReg); 308 LIS [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonExpandCondsets.cpp | 169 LiveIntervals *LIS = nullptr; member in class:__anon5155::HexagonExpandCondsets 318 MachineInstr *MI = LIS->getInstructionFromIndex(K); 334 LiveInterval &LI = LIS->getInterval(Reg); 342 MachineInstr *DefI = LIS->getInstructionFromIndex(NextI->start); 419 MachineInstr *DefI = LIS->getInstructionFromIndex(Seg.start); 426 LiveInterval &LI = LIS->getInterval(Reg); 427 LI.computeSubRangeUndefs(Undefs, LM, *MRI, *LIS->getSlotIndexes()); 430 MachineBasicBlock *BB = LIS->getMBBFromIndex(SI); 431 auto P = Range.extendInBlock(Undefs, LIS->getMBBStartIdx(BB), SI); 442 MachineBasicBlock *BB = LIS [all...] |