Searched refs:EmitSchedule (Results 1 - 5 of 5) sorted by relevance

/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGSDNodes.h119 /// EmitSchedule - Insert MachineInstrs into the MachineBasicBlock
123 EmitSchedule(MachineBasicBlock::iterator &InsertPos);
H A DScheduleDAGFast.cpp650 EmitSchedule(MachineBasicBlock::iterator &InsertPos) override;
762 ScheduleDAGLinearize::EmitSchedule(MachineBasicBlock::iterator &InsertPos) { function in class:ScheduleDAGLinearize
H A DScheduleDAGSDNodes.cpp757 // to a vector which EmitSchedule uses to determine how to insert dbg_value
822 /// EmitSchedule - Emit the machine code in scheduled order. Return the new
827 EmitSchedule(MachineBasicBlock::iterator &InsertPos) {
H A DSelectionDAGISel.cpp1000 LastMBB = FuncInfo->MBB = Scheduler->EmitSchedule(FuncInfo->InsertPt);
/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DPostRASchedulerList.cpp176 void EmitSchedule();
348 Scheduler.EmitSchedule();
364 Scheduler.EmitSchedule();
671 // EmitSchedule - Emit the machine code in scheduled order.
672 void SchedulePostRATDList::EmitSchedule() { function in class:SchedulePostRATDList

Completed in 134 milliseconds