Searched refs:CmpOpc (Results 1 - 8 of 8) sorted by relevance
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | Mips16ISelLowering.h | 64 MachineBasicBlock *emitFEXT_T8I816_ins(unsigned BtOpc, unsigned CmpOpc,
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| H A D | Mips16ISelLowering.cpp | 702 Mips16TargetLowering::emitFEXT_T8I816_ins(unsigned BtOpc, unsigned CmpOpc, argument
711 BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(CmpOpc))
728 unsigned CmpOpc; local
730 CmpOpc = CmpiOpc;
733 CmpOpc = CmpiXOpc;
736 BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(CmpOpc)).addReg(regX).addImm(imm);
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 864 unsigned CmpOpc; local
877 CmpOpc = PPC::EFSCMPEQ;
880 CmpOpc = PPC::EFSCMPLT;
883 CmpOpc = PPC::EFSCMPGT;
887 CmpOpc = PPC::FCMPUS;
899 CmpOpc = PPC::EFDCMPEQ;
902 CmpOpc = PPC::EFDCMPLT;
905 CmpOpc = PPC::EFDCMPGT;
909 CmpOpc = PPC::XSCMPUDP;
911 CmpOpc
[all...] |
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstructionSelector.cpp | 2313 unsigned CmpOpc = selectFCMPOpc(I, MRI); local
2314 if (!CmpOpc)
2325 auto CmpMI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(CmpOpc))
2331 if (CmpOpc != AArch64::FCMPSri && CmpOpc != AArch64::FCMPDri)
3332 unsigned CmpOpc = 0; local
3339 CmpOpc = AArch64::SUBSWrr;
3342 CmpOpc = AArch64::SUBSXrr;
3351 CmpOpc = CmpOpc
3549 unsigned CmpOpc = selectFCMPOpc(*CondDef, MRI); local
[all...] |
| H A D | AArch64FastISel.cpp | 5106 unsigned Opc, CmpOpc; local
5111 CmpOpc = AArch64::SUBSWrs;
5115 CmpOpc = AArch64::SUBSXrs;
5142 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(CmpOpc))
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| H A D | AArch64ISelLowering.cpp | 12038 unsigned CmpOpc = Cmp.getOpcode(); local
12039 if (CmpOpc != AArch64ISD::ADDS && CmpOpc != AArch64ISD::SUBS)
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 1391 unsigned CmpOpc; local
1399 CmpOpc = UseImm ? ARM::VCMPZS : ARM::VCMPS;
1403 CmpOpc = UseImm ? ARM::VCMPZD : ARM::VCMPD;
1413 CmpOpc = ARM::t2CMPrr;
1415 CmpOpc = isNegativeImm ? ARM::t2CMNri : ARM::t2CMPri;
1418 CmpOpc = ARM::CMPrr;
1420 CmpOpc = isNegativeImm ? ARM::CMNri : ARM::CMPri;
1444 const MCInstrDesc &II = TII.get(CmpOpc);
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonHardwareLoops.cpp | 1597 static bool isImmValidForOpcode(unsigned CmpOpc, int64_t Imm) { argument
1599 if (CmpOpc == Hexagon::A4_cmpbeqi)
1601 if (CmpOpc == Hexagon::A4_cmpbgti)
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