Searched refs:CLK_MASK_DIV (Results 1 - 3 of 3) sorted by relevance
| /freebsd-12-stable/sys/mips/ingenic/ |
| H A D | jz4780_clock.c | 166 GENCLK(JZ4780_CLK_CPU, "cpu", CLK_MASK_DIV,
173 GENCLK(JZ4780_CLK_L2CACHE, "l2cache", CLK_MASK_DIV,
180 GENCLK(JZ4780_CLK_AHB0, "ahb0", CLK_MASK_MUX | CLK_MASK_DIV,
194 GENCLK(JZ4780_CLK_AHB2, "ahb2", CLK_MASK_DIV,
201 GENCLK(JZ4780_CLK_PCLK, "pclk", CLK_MASK_DIV,
208 GENCLK(JZ4780_CLK_DDR, "ddr", CLK_MASK_MUX | CLK_MASK_DIV,
215 GENCLK(JZ4780_CLK_VPU, "vpu", CLK_MASK_MUX | CLK_MASK_DIV | CLK_MASK_GATE,
222 GENCLK(JZ4780_CLK_I2SPLL, "i2s_pll", CLK_MASK_MUX | CLK_MASK_DIV,
236 GENCLK(JZ4780_CLK_LCD0PIXCLK, "lcd0pixclk", CLK_MASK_MUX | CLK_MASK_DIV,
243 GENCLK(JZ4780_CLK_LCD1PIXCLK, "lcd1pixclk", CLK_MASK_MUX | CLK_MASK_DIV,
[all...] |
| H A D | jz4780_clk.h | 78 #define CLK_MASK_DIV 0x02 macro
|
| H A D | jz4780_clk_gen.c | 136 if (sc->clk_descr->clk_type & CLK_MASK_DIV) {
|
Completed in 68 milliseconds