Searched refs:BaseIdx (Results 1 - 6 of 6) sorted by relevance
| /freebsd-12-stable/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | PseudoLoweringEmitter.cpp | 57 unsigned BaseIdx);
74 IndexedMap<OpData> &OperandMap, unsigned BaseIdx) {
82 OperandMap[BaseIdx + i].Kind = OpData::Reg;
83 OperandMap[BaseIdx + i].Data.Reg = DI->getDef();
90 // FIXME: We probably shouldn't ever get a non-zero BaseIdx here.
91 assert(BaseIdx == 0 && "Named subargument in pseudo expansion?!");
92 if (DI->getDef() != Insn.Operands[BaseIdx + i].Rec)
96 Insn.Operands[BaseIdx + i].Rec->getName() + "'");
101 OperandMap[BaseIdx + i + I].Kind = OpData::Operand;
104 OperandMap[BaseIdx
73 addDagOperandMapping(Record *Rec, DagInit *Dag, CodeGenInstruction &Insn, IndexedMap<OpData> &OperandMap, unsigned BaseIdx) argument
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| /freebsd-12-stable/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/ |
| H A D | Store.cpp | 516 SVal BaseIdx = ElemR->getIndex(); local
518 if (!BaseIdx.getAs<nonloc::ConcreteInt>())
522 BaseIdx.castAs<nonloc::ConcreteInt>().getValue();
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.cpp | 111 unsigned BaseIdx = alignDown(ST.getMaxNumSGPRs(MF), 4) - 4;
112 unsigned BaseReg(AMDGPU::SGPR_32RegClass.getRegister(BaseIdx));
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | RewriteStatepointsForGC.cpp | 1310 Value *BaseIdx = local
1321 GCRelocateDecl, {StatepointToken, BaseIdx, LiveIdx},
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 4211 SDValue BaseIdx = N->getOperand(1); local
4224 SDValue Index = DAG.getNode(ISD::ADD, dl, BaseIdx.getValueType(),
4225 BaseIdx, DAG.getConstant(i, dl, BaseIdx.getValueType()));
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 6392 unsigned BaseIdx = Op.getConstantOperandVal(2);
6393 UndefElts.insertBits(UndefSubElts, BaseIdx);
6395 EltBits[BaseIdx + i] = EltSubBits[i];
6413 unsigned BaseIdx = Op.getConstantOperandVal(1);
6414 UndefElts = UndefElts.extractBits(NumSubElts, BaseIdx);
6415 if ((BaseIdx + NumSubElts) != NumSrcElts)
6416 EltBits.erase(EltBits.begin() + BaseIdx + NumSubElts, EltBits.end());
6417 if (BaseIdx != 0)
6418 EltBits.erase(EltBits.begin(), EltBits.begin() + BaseIdx);
8141 int64_t BaseIdx
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