Searched refs:And1 (Results 1 - 7 of 7) sorted by relevance
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonLoopIdiomRecognition.cpp | 1615 Instruction *And1 = dyn_cast<Instruction>(I->getOperand(1)); 1616 if (!And0 || !And1) 1619 And1->getOpcode() != Instruction::And) 1621 if (And0->getOperand(1) != And1->getOperand(1)) 1624 return B.CreateAnd(B.CreateXor(And0->getOperand(0), And1->getOperand(0)), 1747 Instruction *And1 = dyn_cast<Instruction>(Xor->getOperand(1)); 1750 std::swap(And0, And1); 1759 return B.CreateAnd(B.CreateXor(And0->getOperand(0), And1), C0);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 875 SDValue And0 = N->getOperand(0), And1 = N->getOperand(1); 888 if (And1.getOpcode() == ISD::AND && 889 And1.getOperand(0).getOpcode() == ISD::SHL) { 891 if (!(CN = dyn_cast<ConstantSDNode>(And1.getOperand(1))) || 899 SDValue Shl = And1.getOperand(0); 926 bool isConstCase = And1.getOpcode() != ISD::AND; 927 if (And1.getOpcode() == ISD::AND) { 928 if (!(CN1 = dyn_cast<ConstantSDNode>(And1->getOperand(1)))) 945 SrlX = DAG.getNode(ISD::SRL, DL, And1->getValueType(0), And1, Const [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 2462 SDValue And1 = N->getOperand(1); local 2463 if (And0.hasOneUse() && And1.hasOneUse() && 2465 isOpcWithIntImmediate(And1.getNode(), ISD::AND, Mask1Imm) && 2473 std::swap(And0, And1); 2477 SDValue Src = And1->getOperand(0);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | LegalizerHelper.cpp | 4066 auto And1 = MIRBuilder.buildAnd(Src1Ty, Src0, SignBitMask); local 4067 Or = MIRBuilder.buildOr(Dst, And0, And1); 4072 auto And1 = MIRBuilder.buildAnd(Src0Ty, Shift, SignBitMask); local 4073 Or = MIRBuilder.buildOr(Dst, And0, And1); 4078 auto And1 = MIRBuilder.buildAnd(Src0Ty, Trunc, SignBitMask); local 4079 Or = MIRBuilder.buildOr(Dst, And0, And1);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineCompares.cpp | 4004 Value *And1 = Builder.CreateAnd(BO0->getOperand(0), Mask); local 4006 return new ICmpInst(Pred, And1, And2);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 6023 SDValue And1 = DAG.getNode(ISD::AND, DL, ShVT, NegOp1, BitWidthMinusOneC); 6025 DAG.getNode(HsOpc, DL, VT, Op0, And1));
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H A D | DAGCombiner.cpp | 5113 SDValue Not = And->getOperand(0), And1 = And->getOperand(1); 5116 if (!isBitwiseNot(Not) || !Not.hasOneUse() || !isOneConstant(And1))
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