Searched refs:AR_HORNET_CH0_DDR_DPLL3 (Results 1 - 2 of 2) sorted by relevance

/freebsd-12-stable/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300phy.h1823 #define AR_HORNET_CH0_DDR_DPLL3 AR_PHY_65NM(overlay_0x16180.Poseidon.ch0_DDR_DPLL3) macro
H A Dar9300_reset.c1420 OS_REG_RMW_FIELD(ah, AR_HORNET_CH0_DDR_DPLL3,
1448 OS_REG_RMW_FIELD(ah, AR_HORNET_CH0_DDR_DPLL3,

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