Searched refs:AR934X_PLL_DDR_CONFIG_REG (Results 1 - 2 of 2) sorted by relevance
| /freebsd-12-stable/sys/mips/atheros/ | ||
| H A D | ar934xreg.h | 67 #define AR934X_PLL_DDR_CONFIG_REG (AR71XX_PLL_CPU_BASE + 0x04) macro |
| H A D | ar934x_chip.c | 144 pll = ATH_READ_REG(AR934X_PLL_DDR_CONFIG_REG); |
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