/freebsd-11.0-release/contrib/llvm/include/llvm/CodeGen/ |
H A D | MachineOperand.h | 192 return isReg() ? 0 : SubReg_TargetFlags; 195 assert(!isReg() && "Register operands can't have target flags"); 200 assert(!isReg() && "Register operands can't have target flags"); 229 /// isReg - Tests if this is a MO_Register operand. 230 bool isReg() const { return OpKind == MO_Register; } function in class:llvm::MachineOperand 268 assert(isReg() && "This is not a register operand!"); 273 assert(isReg() && "Wrong MachineOperand accessor"); 278 assert(isReg() && "Wrong MachineOperand accessor"); 283 assert(isReg() && "Wrong MachineOperand accessor"); 288 assert(isReg() [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/Mips/InstPrinter/ |
H A D | MipsInstPrinter.cpp | 32 static bool isReg(const MCInst &MI, unsigned OpNo) { function 33 assert(MI.getOperand(OpNo).isReg() && "Register operand expected."); 192 if (Op.isReg()) { 299 return (isReg<Mips::ZERO>(MI, 0) && isReg<Mips::ZERO>(MI, 1) && 301 (isReg<Mips::ZERO>(MI, 1) && printAlias("beqz", MI, 0, 2, OS)); 304 return isReg<Mips::ZERO_64>(MI, 1) && printAlias("beqz", MI, 0, 2, OS); 307 return isReg<Mips::ZERO>(MI, 1) && printAlias("bnez", MI, 0, 2, OS); 310 return isReg<Mips::ZERO_64>(MI, 1) && printAlias("bnez", MI, 0, 2, OS); 313 return isReg<Mip [all...] |
/freebsd-11.0-release/contrib/llvm/lib/MC/ |
H A D | MCInstrDesc.cpp | 47 if (MI.getOperand(i).isReg() && 66 if (MI.getOperand(i).isReg() &&
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H A D | MCInst.cpp | 22 else if (isReg())
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/freebsd-11.0-release/contrib/llvm/lib/Target/AMDGPU/ |
H A D | SIFoldOperands.cpp | 67 assert(FoldOp->isReg()); 111 assert(Old.isReg()); 183 if (CanCommute && (!MI->getOperand(CommuteIdx0).isReg() || 184 !MI->getOperand(CommuteIdx1).isReg())) 208 if (UseOp.isReg() && ((UseOp.getSubReg() && OpToFold.isReg()) || 327 if (!FoldingImm && !OpToFold.isReg()) 337 if (OpToFold.isReg() && 348 if (Dst.isReg() && 376 assert(Fold.OpToFold && Fold.OpToFold->isReg()); [all...] |
H A D | SIShrinkInstructions.cpp | 77 if (!MO->isReg()) 159 if (Src0.isReg() && !isVGPR(&Src0, TRI, MRI)) 163 if (Src0.isReg() && MRI.hasOneUse(Src0.getReg())) { 273 if (!Src2->isReg())
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/freebsd-11.0-release/contrib/llvm/lib/Target/PowerPC/MCTargetDesc/ |
H A D | PPCMCCodeEmitter.cpp | 157 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); 169 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); 182 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); 195 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); 207 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); 220 assert(MI.getOperand(OpNo+1).isReg()); 239 assert(MI.getOperand(OpNo+1).isReg()); 259 assert(MI.getOperand(OpNo+1).isReg()); 275 assert(MI.getOperand(OpNo+1).isReg()); 291 assert(MI.getOperand(OpNo+1).isReg()); [all...] |
/freebsd-11.0-release/contrib/llvm/lib/CodeGen/ |
H A D | AntiDepBreaker.h | 60 if (MI && MI->getOperand(0).isReg() && MI->getOperand(0).getReg() == OldReg)
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H A D | LivePhysRegs.cpp | 47 if (O->isReg()) { 60 if (!O->isReg() || !O->readsReg() || O->isUndef()) 77 if (O->isReg()) { 98 if (Reg.second->isReg() && Reg.second->isDead())
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H A D | MachineInstr.cpp | 99 assert(isReg() && "Wrong MachineOperand accessor"); 119 if (!isReg() || !isOnRegUseList()) 134 assert((!isReg() || !isTied()) && "Cannot change a tied operand into an imm"); 143 assert((!isReg() || !isTied()) && "Cannot change a tied operand into an imm"); 152 assert((!isReg() || !isTied()) && 164 assert((!isReg() || !isTied()) && 186 bool WasReg = isReg(); 698 if (MO.isReg()) 707 if (MO.isReg()) 754 bool isImpReg = Op.isReg() [all...] |
H A D | DeadMachineInstructionElim.cpp | 74 if (MO.isReg() && MO.isDef()) { 140 if (MO.isReg() && MO.isDef()) { 159 if (MO.isReg() && MO.isUse()) {
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/freebsd-11.0-release/contrib/llvm/lib/Target/Sparc/InstPrinter/ |
H A D | SparcInstPrinter.cpp | 62 if (!MI->getOperand(0).isReg()) 86 || (!MI->getOperand(0).isReg()) 112 if (MO.isReg()) { 139 if (MO.isReg() && MO.getReg() == SP::G0)
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/freebsd-11.0-release/contrib/llvm/lib/Target/BPF/InstPrinter/ |
H A D | BPFInstPrinter.cpp | 56 if (Op.isReg()) { 77 assert(RegOp.isReg() && "Register operand not a register");
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/freebsd-11.0-release/contrib/llvm/lib/Target/Sparc/MCTargetDesc/ |
H A D | SparcMCCodeEmitter.cpp | 119 if (MO.isReg()) 146 if (MO.isReg() || MO.isImm()) 181 if (MO.isReg() || MO.isImm()) 194 if (MO.isReg() || MO.isImm()) 206 if (MO.isReg() || MO.isImm())
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/freebsd-11.0-release/contrib/llvm/include/llvm/MC/ |
H A D | MCInst.h | 56 bool isReg() const { return Kind == kRegister; } function in class:llvm::MCOperand 64 assert(isReg() && "This is not a register operand!"); 70 assert(isReg() && "This is not a register operand!");
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H A D | MachineLocation.h | 53 bool isReg() const { return IsRegister; } function
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/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/ |
H A D | AArch64DeadRegisterDefinitionsPass.cpp | 67 if (MO.isReg() && MO.isDef()) 93 if (MO.isReg() && MO.isDead() && MO.isDef()) {
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/freebsd-11.0-release/contrib/llvm/lib/Target/Hexagon/ |
H A D | HexagonNewValueJump.cpp | 152 if (II->getOperand(i).isReg() && 506 MI->getOperand(0).isReg() && 514 isSecondOpReg = MI->getOperand(2).isReg(); 548 if (MI->getOperand(0).isReg() && 605 if (MO.isReg() && MO.isUse()) { 612 if (localMO.isReg() && localMO.isUse() && 667 if (cmpInstr->getOperand(0).isReg() && 670 if (cmpInstr->getOperand(1).isReg() &&
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H A D | HexagonExpandCondsets.cpp | 277 if (!Op.isReg() || !Op.isUse() || Op.getReg() != Reg) 309 if (!Op.isReg() || !Op.isDef() || Op.getReg() != Reg) 337 if (!Op.isReg() || !Op.isDef() || Op.getReg() != Reg) 366 if (!Op.isReg() || !Op.isUse() || Op.getReg() != Reg) 437 if (Op.isReg() && Op.isDef()) 514 if (!Op.isReg() || !Op.isUse() || Op.isImplicit() || Op.isUndef()) 553 if (!Op.isReg() || !Op.isDef()) 631 if (!Op.isReg() || !Op.isUse()) 652 if (SO.isReg()) { 758 if (!Op.isReg() || !O [all...] |
H A D | HexagonVLIWPacketizer.cpp | 115 if (!MO.isReg() || !MO.isDef()) 283 if (MO.isReg() && MO.isUse() && (MO.getReg() == DepReg)) 351 if (MO.isReg() && MO.getReg() == MI->getOperand(0).getReg()) 391 if (MO.isReg() && MO.getReg() == DestReg) 457 if (MO.isReg() && MO.isDef()) 461 if (MO.isReg() && MO.isUse() && DefRegsSet.count(MO.getReg())) 467 assert(Op1.isReg() && "Post increment operand has be to a register."); 473 assert(Op0.isReg() && "Post increment operand has be to a register."); 532 if (Val.isReg() && Val.getReg() != DepReg) 585 if (!MO.isReg()) [all...] |
H A D | HexagonHardwareLoops.cpp | 312 bool isReg() const { return Kind == CV_Register; } function in class:__anon2866::CountValue 316 assert(isReg() && "Wrong CountValue accessor"); 320 assert(isReg() && "Wrong CountValue accessor"); 329 if (isReg()) { OS << PrintReg(Contents.R.Reg, TRI, Contents.R.Sub); } 642 if (Op1.isReg()) { 662 if (InitialValue->isReg()) { 669 if (EndValue->isReg()) { 696 if (Start->isReg()) { 702 if (End->isReg()) { 709 if (!Start->isReg() [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/NVPTX/ |
H A D | NVPTXPeephole.cpp | 85 if (Op.isReg() && TargetRegisterInfo::isVirtualRegister(Op.getReg())) { 98 if (BaseAddrOp.isReg() && BaseAddrOp.getReg() == NVPTX::VRFrame) {
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/freebsd-11.0-release/contrib/llvm/include/llvm/MC/MCParser/ |
H A D | MCParsedAsmOperand.h | 58 /// isReg - Is this a register operand? 59 virtual bool isReg() const = 0;
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/freebsd-11.0-release/contrib/llvm/lib/Target/XCore/InstPrinter/ |
H A D | XCoreInstPrinter.cpp | 76 if (Op.isReg()) {
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/freebsd-11.0-release/contrib/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsELFStreamer.cpp | 28 if (!Op.isReg())
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