Searched refs:cfg2 (Results 1 - 14 of 14) sorted by relevance
| /freebsd-11.0-release/sys/mips/mips/ |
| H A D | cpu.c | 77 u_int32_t cfg2; local
204 /* We don't have valid cfg2 register */
208 cfg2 = mips_rd_config2();
210 tmp = (cfg2 >> MIPS_CONFIG2_SL_SHIFT) & MIPS_CONFIG2_SL_MASK;
214 tmp = (cfg2 >> MIPS_CONFIG2_SS_SHIFT) & MIPS_CONFIG2_SS_MASK;
218 tmp = (cfg2 >> MIPS_CONFIG2_SA_SHIFT) & MIPS_CONFIG2_SA_MASK;
248 uint32_t cfg0, cfg1, cfg2, cfg3; local
376 cfg2 = mips_rd_config2();
381 printf(" Config2=0x%08x\n", cfg2);
384 if (!(cfg2
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| /freebsd-11.0-release/sys/dev/ata/chipsets/ |
| H A D | ata-promise.c | 180 if ((idx->cfg2 & PR_SX6K) && pci_get_class(GRANDPARENT(dev))==PCIC_BRIDGE &&
190 if ((idx->cfg2 & PR_TX4) && pci_get_class(GRANDPARENT(dev))==PCIC_BRIDGE &&
252 if (ctlr->chip->cfg2 == PR_SX4X &&
265 if (ctlr->chip->cfg2 == PR_SX4X) {
314 switch (ctlr->chip->cfg2) {
346 if ((ctlr->chip->cfg2 == PR_SATA2) || (ctlr->chip->cfg2 == PR_CMBO2))
503 (ctlr->chip->cfg2 & PR_SX4X ? 0x000c0260 : 0x0260) +
547 int offset = (ctlr->chip->cfg2 & PR_SX4X) ? 0x000c0000 : 0;
560 if ((ctlr->chip->cfg2
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| H A D | ata-acerlabs.c | 112 switch (ctlr->chip->cfg2) {
178 if (ctlr->chip->cfg2 == ALI_SATA) {
202 if (ctlr->chip->cfg2 & ALI_NEW && ctlr->chip->chiprev < 0xc7)
210 if (ctlr->chip->cfg2 & ALI_NEW)
308 if (ctlr->chip->cfg2 & ALI_NEW && ctlr->chip->chiprev < 0xc7) {
315 if (ctlr->chip->cfg2 & ALI_OLD) {
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| H A D | ata-siliconimage.c | 122 if (ctlr->chip->cfg2 & SII_SETCLK) {
132 if (ctlr->chip->cfg2 & SII_4CH) {
185 if (ctlr->chip->cfg2 & SII_INTR)
281 if (ctlr->chip->cfg2 & SII_BUG) {
289 if (ctlr->chip->cfg2 & SII_SETCLK)
365 if (ctlr->chip->cfg2 & SII_SETCLK) {
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| H A D | ata-jmicron.c | 108 ctlr->channels = ctlr->chip->cfg2;
126 ctlr->channels = ctlr->chip->cfg2;
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| H A D | ata-via.c | 154 if (ctlr->chip->cfg2 & VIASATA) {
171 if (ctlr->chip->cfg2 & VIABAR) {
181 if (ctlr->chip->cfg2 & VIACLK)
185 if (ctlr->chip->cfg2 & VIABUG)
214 if (ctlr->chip->cfg2 & VIABAR) {
271 if (ctlr->chip->cfg2 & VIABAR) {
295 if ((ctlr->chip->cfg2 & VIABAR) && (ch->unit > 1))
320 if ((ctlr->chip->cfg2 & VIABAR) && (ch->unit > 1)) {
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| H A D | ata-marvell.c | 108 switch (ctlr->chip->cfg2) {
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| H A D | ata-sis.c | 117 if (idx->cfg2) {
131 if (idx->cfg2 && !found) {
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| H A D | ata-highpoint.c | 117 if (ctlr->chip->cfg2 == HPT_OLD) {
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| H A D | ata-serverworks.c | 139 ctlr->channels = ctlr->chip->cfg2;
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| H A D | ata-intel.c | 250 ctlr->channels = ctlr->chip->cfg2;
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| /freebsd-11.0-release/sys/arm/altera/socfpga/ |
| H A D | socfpga_gpio.c | 159 int cfg2; local
187 cfg2 = READ4(sc, GPIO_CONFIG_REG2);
188 nr_pins = (cfg2 >> ENCODED_ID_PWIDTH_S(PORTA)) & \
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| /freebsd-11.0-release/sys/dev/et/ |
| H A D | if_et.c | 507 uint32_t cfg1, cfg2, ctrl; local
543 cfg2 = CSR_READ_4(sc, ET_MAC_CFG2);
544 cfg2 &= ~(ET_MAC_CFG2_MODE_MII | ET_MAC_CFG2_MODE_GMII |
546 cfg2 |= ET_MAC_CFG2_LENCHK | ET_MAC_CFG2_CRC | ET_MAC_CFG2_PADCRC |
551 cfg2 |= ET_MAC_CFG2_MODE_GMII;
553 cfg2 |= ET_MAC_CFG2_MODE_MII;
558 cfg2 |= ET_MAC_CFG2_FDX;
580 CSR_WRITE_4(sc, ET_MAC_CFG2, cfg2);
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| /freebsd-11.0-release/sys/dev/ata/ |
| H A D | ata-pci.h | 34 int cfg2; member in struct:ata_chip_id
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