Searched refs:VEX (Results 1 - 3 of 3) sorted by relevance

/freebsd-11.0-release/contrib/llvm/lib/Target/X86/MCTargetDesc/
H A DX86BaseInfo.h398 // XOPA - Prefix to encode 0xA in VEX.MMMM of XOP instructions.
476 // VEX - encoding using 0xC4/0xC5
477 VEX = 1 << EncodingShift,
503 /// operand 3 with VEX.vvvv.
513 /// VEX_L - Stands for a bit in the VEX opcode prefix meaning the current
520 // VEX_LIG - Specifies that this instruction ignores the L-bit in the VEX
530 // - 11 LIG (but, in insn encoding, leave VEX.L and EVEX.L in zeros.
H A DX86MCCodeEmitter.cpp81 // In the VEX prefix, registers are seen sequencially from 0-15 and encoded
85 // VEX.VVVV => XMM9 => ~9
586 /// called VEX.
591 assert(!(TSFlags & X86II::LOCK) && "Can't have LOCK VEX.");
627 // VEX_5M (VEX m-mmmmm field):
639 // VEX_4V (VEX vvvv field): a register specifier
918 if (Encoding == X86II::VEX || Encoding == X86II::XOP) {
919 // VEX opcode prefix can have 2 or 3 bytes
936 // Can we use the 2 byte VEX prefix?
937 if (Encoding == X86II::VEX
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/freebsd-11.0-release/contrib/llvm/utils/TableGen/
H A DX86RecognizableInstr.cpp127 VEX = 1, XOP = 2, EVEX = 3 enumerator in enum:X86Local::__anon4616
256 // Special case since there is no attribute class for 64-bit and VEX
291 errs() << "Don't support VEX.L if EVEX_L2 is enabled: " << Name << "\n";
292 llvm_unreachable("Don't support VEX.L if EVEX_L2 is enabled");
377 } else if (Encoding == X86Local::VEX || Encoding == X86Local::XOP) {
609 // - In AVX, there is a register operand in the VEX.vvvv field here -
621 // in ModRMVEX and the one above the one in the VEX.VVVV field
630 // - In AVX, there is a register operand in the VEX.vvvv field here -
643 // in ModRMVEX and the one above the one in the VEX.VVVV field
652 // - In AVX, there is a register operand in the VEX
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