Searched refs:Subreg (Results 1 - 5 of 5) sorted by relevance
| /freebsd-11.0-release/contrib/llvm/lib/Target/ARM/ |
| H A D | Thumb2ITBlockPass.cpp | 78 for (MCSubRegIterator Subreg(Reg, TRI, /*IncludeSelf=*/true);
79 Subreg.isValid(); ++Subreg)
80 Uses.insert(*Subreg);
85 for (MCSubRegIterator Subreg(Reg, TRI, /*IncludeSelf=*/true);
86 Subreg.isValid(); ++Subreg)
87 Defs.insert(*Subreg);
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| /freebsd-11.0-release/contrib/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 2818 SDValue Subreg = CurDAG->getTargetExtractSubreg(X86::sub_8bit, dl, local
2823 Subreg, Imm);
2853 SDValue Subreg = CurDAG->getTargetExtractSubreg(X86::sub_8bit_hi, dl, local
2860 MVT::i32, Subreg, ShiftedImm);
2878 SDValue Subreg = CurDAG->getTargetExtractSubreg(X86::sub_16bit, dl, local
2883 Subreg, Imm);
2901 SDValue Subreg = CurDAG->getTargetExtractSubreg(X86::sub_32bit, dl, local
2906 Subreg, Imm);
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| /freebsd-11.0-release/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 2434 unsigned Subreg = (X == 0) ? Hexagon::subreg_loreg : 0; local
2437 Subreg = Hexagon::subreg_loreg;
2439 Subreg = Hexagon::subreg_hireg;
2441 Subreg = Hexagon::subreg_hireg;
2443 Subreg = Hexagon::subreg_hireg;
2446 N = DAG.getTargetExtractSubreg(Subreg, dl, MVT::i32, Vec);
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| /freebsd-11.0-release/contrib/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 1007 SDValue Operand, SDValue Subreg);
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| /freebsd-11.0-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 6221 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, local
6223 return SDValue(Subreg, 0);
6230 SDValue Operand, SDValue Subreg) {
6233 VT, Operand, Subreg, SRIdxVal);
6229 getTargetInsertSubreg(int SRIdx, SDLoc DL, EVT VT, SDValue Operand, SDValue Subreg) argument
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