Searched refs:Srl_imm (Results 1 - 2 of 2) sorted by relevance
/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1459 uint64_t Srl_imm = 0; local 1462 isOpcWithIntImmediate(Op0->getOperand(0).getNode(), ISD::SRL, Srl_imm)) { 1470 Srl_imm)) { 1476 } else if (isOpcWithIntImmediate(Op0, ISD::SRL, Srl_imm)) { 1490 if (!BiggerPattern && (Srl_imm <= 0 || Srl_imm >= VT.getSizeInBits())) { 1496 LSB = Srl_imm; 1497 MSB = Srl_imm + (VT == MVT::i32 ? countTrailingOnes<uint32_t>(And_imm) 1525 // UBFM Value, ShiftImm, BitWide + Srl_imm -1 1537 uint64_t Srl_imm local 1606 uint64_t Srl_imm = 0; local [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/ |
H A D | ARMISelDAGToDAG.cpp | 389 unsigned Srl_imm = 0; local 390 if (!isOpcWithIntImmediate(Srl.getNode(), ISD::SRL, Srl_imm) || 391 (Srl_imm <= 2)) 411 CurDAG->getConstant(Srl_imm + TZ, SDLoc(Srl), 2343 unsigned Srl_imm = 0; local 2345 Srl_imm)) { 2346 assert(Srl_imm > 0 && Srl_imm < 32 && "bad amount in shift node!"); 2350 unsigned LSB = Srl_imm; 2388 unsigned Srl_imm local [all...] |
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