Searched refs:Spill (Results 1 - 4 of 4) sorted by relevance

/freebsd-11.0-release/contrib/llvm/lib/Target/AMDGPU/
H A DSIMachineFunctionInfo.cpp159 struct SpilledReg Spill; local
184 Spill.VGPR = LaneVGPRs[LaneVGPRIdx];
185 Spill.Lane = Lane;
186 return Spill;
H A DSIMachineFunctionInfo.h268 void setHasSpilledSGPRs(bool Spill = true) {
269 HasSpilledSGPRs = Spill;
276 void setHasSpilledVGPRs(bool Spill = true) {
277 HasSpilledVGPRs = Spill;
H A DSIRegisterInfo.cpp308 struct SIMachineFunctionInfo::SpilledReg Spill = local
313 Spill.VGPR)
315 .addImm(Spill.Lane);
336 struct SIMachineFunctionInfo::SpilledReg Spill = local
342 .addReg(Spill.VGPR)
343 .addImm(Spill.Lane)
/freebsd-11.0-release/contrib/llvm/lib/CodeGen/
H A DRegAllocBasic.cpp163 // Spill or split all live virtual registers currently unified under PhysReg
189 // Spill each interfering vreg allocated to PhysReg or an alias.
191 LiveInterval &Spill = *Intfs[i]; local
194 if (!VRM->hasPhys(Spill.reg))
199 Matrix->unassign(Spill);
201 // Spill the extracted interval.
202 LiveRangeEdit LRE(&Spill, SplitVRegs, *MF, *LIS, VRM);

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