Searched refs:SRsrc (Results 1 - 2 of 2) sorted by relevance
/freebsd-11.0-release/contrib/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelDAGToDAG.cpp | 98 bool SelectMUBUF(SDValue Addr, SDValue &SRsrc, SDValue &VAddr, 102 bool SelectMUBUFAddr64(SDValue Addr, SDValue &SRsrc, SDValue &VAddr, 105 bool SelectMUBUFAddr64(SDValue Addr, SDValue &SRsrc, 110 bool SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, SDValue &SOffset, 113 bool SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, SDValue &Soffset, 995 bool AMDGPUDAGToDAGISel::SelectMUBUFAddr64(SDValue Addr, SDValue &SRsrc, argument 1016 SRsrc = SDValue(Lowering.wrapAddr64Rsrc(*CurDAG, DL, Ptr), 0); 1023 bool AMDGPUDAGToDAGISel::SelectMUBUFAddr64(SDValue Addr, SDValue &SRsrc, argument 1030 return SelectMUBUFAddr64(Addr, SRsrc, VAddr, SOffset, Offset, GLC, SLC, TFE); 1065 bool AMDGPUDAGToDAGISel::SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, argument 1093 SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, SDValue &Soffset, SDValue &Offset, SDValue &GLC) const argument [all...] |
H A D | SIInstrInfo.cpp | 2087 MachineOperand *SRsrc = &MI->getOperand(SRsrcIdx); 2089 if (RI.getCommonSubClass(MRI.getRegClass(SRsrc->getReg()), 2099 unsigned SRsrcPtr = buildExtractSubReg(MI, MRI, *SRsrc, 2183 .addOperand(*SRsrc) 2210 .addOperand(*SRsrc) 2228 SRsrc = getNamedOperand(*MI, AMDGPU::OpName::srsrc); 2234 SRsrc->setReg(NewSRsrc); 2381 unsigned SRsrc = MRI.createVirtualRegister(&AMDGPU::SReg_128RegClass); 2394 BuildMI(*MBB, MI, MI->getDebugLoc(), get(AMDGPU::REG_SEQUENCE), SRsrc) 2414 .addReg(SRsrc) [all...] |
Completed in 60 milliseconds