Searched refs:SITargetLowering (Results 1 - 4 of 4) sorted by relevance

/freebsd-11.0-release/contrib/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp39 SITargetLowering::SITargetLowering(TargetMachine &TM, function in class:SITargetLowering
294 bool SITargetLowering::isShuffleMaskLegal(const SmallVectorImpl<int> &,
301 bool SITargetLowering::isLegalFlatAddressingMode(const AddrMode &AM) const {
307 bool SITargetLowering::isLegalMUBUFAddressingMode(const AddrMode &AM) const {
342 bool SITargetLowering::isLegalAddressingMode(const DataLayout &DL,
433 bool SITargetLowering::allowsMisalignedMemoryAccesses(EVT VT,
475 EVT SITargetLowering::getOptimalMemOpType(uint64_t Size, unsigned DstAlign,
501 bool SITargetLowering::isNoopAddrSpaceCast(unsigned SrcAS,
507 bool SITargetLowering
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H A DAMDGPUSubtarget.cpp99 TLInfo.reset(new SITargetLowering(TM, *this));
H A DSIISelLowering.h23 class SITargetLowering : public AMDGPUTargetLowering { class in namespace:llvm
65 SITargetLowering(TargetMachine &tm, const AMDGPUSubtarget &STI);
H A DAMDGPUISelDAGToDAG.cpp170 const SITargetLowering *TL
171 = static_cast<const SITargetLowering *>(getTargetLowering());
270 const SITargetLowering& Lowering =
271 *static_cast<const SITargetLowering*>(getTargetLowering());
497 const SITargetLowering& Lowering =
498 *static_cast<const SITargetLowering*>(getTargetLowering());
1013 const SITargetLowering& Lowering =
1014 *static_cast<const SITargetLowering*>(getTargetLowering());
1084 const SITargetLowering& Lowering =
1085 *static_cast<const SITargetLowering*>(getTargetLowerin
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