Searched refs:RO (Results 1 - 18 of 18) sorted by relevance

/freebsd-11.0-release/contrib/ntp/libparse/
H A Dinfo_trimble.c56 { CMD_RDATAA, "CMD_RDATAA", "data channel A configuration (0x3D)", "trimble_channelA", RO },
57 { CMD_RALMANAC, "CMD_RALMANAC", "almanac data for sat (0x40)", "gps_almanac", RO },
58 { CMD_RCURTIME, "CMD_RCURTIME", "GPS time (0x41)", "gps_time", RO },
59 { CMD_RSPOSXYZ, "CMD_RSPOSXYZ", "single precision XYZ position (0x42)", "gps_position(XYZ)", RO|DEF },
60 { CMD_RVELOXYZ, "CMD_RVELOXYZ", "velocity fix (XYZ ECEF) (0x43)", "gps_velocity(XYZ)", RO|DEF },
61 { CMD_RBEST4, "CMD_RBEST4", "best 4 satellite selection (0x44)", "trimble_best4", RO|DEF },
62 { CMD_RVERSION, "CMD_RVERSION", "software version (0x45)", "trimble_version", RO|DEF },
63 { CMD_RRECVHEALTH, "CMD_RRECVHEALTH", "receiver health (0x46)", "trimble_receiver_health", RO|DEF },
64 { CMD_RSIGNALLV, "CMD_RSIGNALLV", "signal levels of all satellites (0x47)", "trimble_signal_levels", RO },
65 { CMD_RMESSAGE, "CMD_RMESSAGE", "GPS system message (0x48)", "gps-message", RO|DE
[all...]
/freebsd-11.0-release/contrib/ntp/ntpd/
H A Dntp_control.c337 { CS_STRATUM, RO, "stratum" }, /* 2 */
338 { CS_PRECISION, RO, "precision" }, /* 3 */
339 { CS_ROOTDELAY, RO, "rootdelay" }, /* 4 */
340 { CS_ROOTDISPERSION, RO, "rootdisp" }, /* 5 */
341 { CS_REFID, RO, "refid" }, /* 6 */
342 { CS_REFTIME, RO, "reftime" }, /* 7 */
343 { CS_POLL, RO, "tc" }, /* 8 */
344 { CS_PEERID, RO, "peer" }, /* 9 */
345 { CS_OFFSET, RO, "offset" }, /* 10 */
346 { CS_DRIFT, RO, "frequenc
[all...]
H A Drefclock_neoclock4x.c738 tt = add_var(&out->kv_list, sizeof(tmpbuf)-1, RO|DEF);
741 tt = add_var(&out->kv_list, 40, RO|DEF);
743 tt = add_var(&out->kv_list, 40, RO|DEF);
745 tt = add_var(&out->kv_list, 40, RO|DEF);
747 tt = add_var(&out->kv_list, 40, RO|DEF);
754 tt = add_var(&out->kv_list, 40, RO|DEF);
761 tt = add_var(&out->kv_list, 40, RO|DEF);
768 tt = add_var(&out->kv_list, 80, RO|DEF);
770 tt = add_var(&out->kv_list, 40, RO|DEF);
772 tt = add_var(&out->kv_list, 80, RO|DE
[all...]
H A Drefclock_parse.c3556 tt = add_var(&out->kv_list, 80, RO);
3563 tt = add_var(&out->kv_list, 80, RO|DEF);
3567 start = tt = add_var(&out->kv_list, 128, RO|DEF);
3587 start = tt = add_var(&out->kv_list, 512, RO|DEF);
3619 start = tt = add_var(&out->kv_list, 80, RO|DEF);
3636 start = tt = add_var(&out->kv_list, LEN_STATES, RO|DEF);
3680 tt = add_var(&out->kv_list, 32, RO);
3683 tt = add_var(&out->kv_list, 80, RO);
3686 tt = add_var(&out->kv_list, 128, RO);
4337 set_var(&parse->kv, buffer, strlen(buffer)+1, RO|DE
[all...]
H A Dntp_config.c4554 set_sys_var(line, strlen(line) + 1, RO);
4707 set_sys_var(line, strlen(line) + 1, RO);
/freebsd-11.0-release/contrib/llvm/lib/Analysis/
H A DScalarEvolutionNormalization.cpp215 const SCEV *RO = X->getRHS(); local
217 const SCEV *RN = TransformSubExpr(RO, User, OperandValToReplace);
218 if (LO != LN || RO != RN)
/freebsd-11.0-release/sys/dev/aic7xxx/aicasm/
H A Daicasm_symbol.h65 RO = 0x01, enumerator in enum:__anon9089
H A Daicasm_scan.l171 RW|RO|WO {
174 else if (strcmp(yytext, "RO") == 0)
175 yylval.value = RO;
H A Daicasm_gram.y1806 if (symbol->info.rinfo->mode == RO) {
/freebsd-11.0-release/contrib/llvm/lib/Target/Hexagon/
H A DHexagonEarlyIfConv.cpp785 const MachineOperand &RO = PN->getOperand(i), &BO = PN->getOperand(i+1); local
787 SR = RO.getReg(), SSR = RO.getSubReg();
789 TR = RO.getReg(), TSR = RO.getSubReg();
791 FR = RO.getReg(), FSR = RO.getSubReg();
H A DHexagonGenInsert.cpp363 OrderedRegisterList(const RegisterOrdering &RO) : Ord(RO) {} argument
485 void buildOrderingMF(RegisterOrdering &RO) const;
486 void buildOrderingBT(RegisterOrdering &RB, RegisterOrdering &RO) const;
553 void HexagonGenInsert::buildOrderingMF(RegisterOrdering &RO) const {
569 RO.insert(std::make_pair(R, Index++));
581 RegisterOrdering &RO) const {
593 RO.insert(std::make_pair(VRs[i], i));
H A DHexagonExpandCondsets.cpp170 void renameInRange(RegisterRef RO, RegisterRef RN, unsigned PredR,
937 /// In the range [First, Last], rename all references to the "old" register RO
940 void HexagonExpandCondsets::renameInRange(RegisterRef RO, RegisterRef RN, argument
954 if (!Op.isReg() || RO != RegisterRef(Op))
H A DHexagonInstrInfo.cpp542 const MachineOperand &RO = Cond[1]; local
543 unsigned Flags = getUndefRegState(RO.isUndef());
544 BuildMI(&MBB, DL, get(BccOpc)).addReg(RO.getReg(), Flags).addMBB(TBB);
565 const MachineOperand &RO = Cond[1]; local
566 unsigned Flags = getUndefRegState(RO.isUndef());
567 BuildMI(&MBB, DL, get(BccOpc)).addReg(RO.getReg(), Flags).addMBB(TBB);
/freebsd-11.0-release/contrib/llvm/utils/TableGen/
H A DAsmWriterEmitter.cpp842 const CodeGenInstAlias::ResultOperand &RO = CGA.ResultOperands[i]; local
844 switch (RO.Kind) {
846 const Record *Rec = RO.getRecord();
847 StringRef ROName = RO.getName();
928 MIOpNum += RO.getMINumOperands();
/freebsd-11.0-release/contrib/llvm/tools/llvm-diff/
H A DDifferenceEngine.cpp354 Value *LO = L->getOperand(I), *RO = R->getOperand(I); local
355 if (!equivalentAsOperands(LO, RO)) {
356 if (Complain) Engine.logf("operands %l and %r differ") << LO << RO; local
/freebsd-11.0-release/contrib/llvm/include/llvm/ExecutionEngine/Orc/
H A DCompileOnDemandLayer.h87 typedef ResourceOwnerImpl<ResourceT, ResourcePtrT> RO; typedef
88 return llvm::make_unique<RO>(std::move(ResourcePtr));
/freebsd-11.0-release/contrib/llvm/tools/clang/lib/StaticAnalyzer/Core/
H A DRegionStore.cpp112 const RegionOffset &RO = R->getAsOffset(); local
113 if (RO.hasSymbolicOffset())
114 return BindingKey(cast<SubRegion>(R), cast<SubRegion>(RO.getRegion()), k);
116 return BindingKey(RO.getRegion(), RO.getOffset(), k);
1101 const RegionOffset &RO = baseR->getAsOffset(); local
1103 if (RO.hasSymbolicOffset()) {
1111 uint64_t LowerOffset = RO.getOffset();
/freebsd-11.0-release/contrib/ntp/include/
H A Dntpd.h93 #define RO (CAN_READ) macro

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