Searched refs:QCA953X_PLL_DDR_CONFIG_REG (Results 1 - 2 of 2) sorted by relevance

/freebsd-11.0-release/sys/mips/atheros/
H A Dqca953xreg.h65 #define QCA953X_PLL_DDR_CONFIG_REG (AR71XX_PLL_CPU_BASE + 0x04) macro
H A Dqca953x_chip.c100 pll = ATH_READ_REG(QCA953X_PLL_DDR_CONFIG_REG);

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