Searched refs:Mask1 (Results 1 - 4 of 4) sorted by relevance
| /freebsd-11.0-release/contrib/llvm/lib/Transforms/Vectorize/ |
| H A D | BBVectorize.cpp | 2836 std::vector<Constant *> Mask1(numElemI), Mask2(numElemI);
2838 Mask1[v] = ConstantInt::get(Type::getInt32Ty(Context), v);
2843 ConstantVector::get(Mask1),
2851 std::vector<Constant *> Mask1(numElemJ), Mask2(numElemJ);
2853 Mask1[v] = ConstantInt::get(Type::getInt32Ty(Context), v);
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| /freebsd-11.0-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 3700 // fold (or (shuf A, V_0, MA), (shuf B, V_0, MB)) -> (shuf A, B, Mask1)
3714 // - Mask1 is a shuffle mask for a shuffle with N0 as the first operand
3720 SmallVector<int,4> Mask1; local
3729 Mask1.push_back(M0);
3741 Mask1.push_back(M0 < (int)NumElts ? M0 : M1 + NumElts);
3747 if (TLI.isShuffleMaskLegal(Mask1, VT))
3749 N1->getOperand(0), &Mask1[0]);
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| /freebsd-11.0-release/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 4124 SDValue Mask1 = DAG.getConstant(0x80000000, dl, MVT::i32); local
4126 Tmp1 = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp1, Mask1);
9228 // (bfi A, (and B, Mask1), Mask2) -> (bfi A, B, Mask2) iff
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| /freebsd-11.0-release/contrib/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 13807 SDValue Mask1 =
13813 SDValue SignBit = DAG.getNode(X86ISD::FAND, dl, LogicVT, Op1, Mask1);
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